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  1. Mar 09, 2021
  2. Mar 08, 2021
    • Peter Maydell's avatar
      Merge remote-tracking branch 'remotes/philmd-gitlab/tags/renesas-20210306' into staging · 229a8345
      Peter Maydell authored
      
      Renesas patches queue
      
      - MMU prototype cleanups
      - Clarify licenses
      - Fine-grained Kconfig entries for SH-4 devices
      
      # gpg: Signature made Sat 06 Mar 2021 15:30:46 GMT
      # gpg:                using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
      # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
      # Primary key fingerprint: FAAB E75E 1291 7221 DCFD  6BB2 E3E3 2C2C DEAD C0DE
      
      * remotes/philmd-gitlab/tags/renesas-20210306:
        hw/sh4/sh7750_regs: Replace link to license by its full content
        hw/sh4: Remove now unused CONFIG_SH4 from Kconfig
        hw/pci-host: Introduce SH_PCI Kconfig entry
        hw/block: Introduce TC58128 eeprom Kconfig entry
        hw/timer: Introduce SH_TIMER Kconfig entry
        hw/char: Introduce SH_SCI Kconfig entry
        hw/intc: Introduce SH_INTC Kconfig entry
        hw/sh4: Add missing Kconfig dependency on SH7750 for the R2D board
        hw/sh4: Add missing license
        target/sh4: Remove unused definitions
        target/sh4: Let get_physical_address() use MMUAccessType access_type
        target/sh4: Remove unused 'int access_type' argument
        target/sh4: Replace magic value by MMUAccessType definitions
        target/sh4: Fix code style for checkpatch.pl
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      229a8345
    • Peter Maydell's avatar
      Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging · 0436c55e
      Peter Maydell authored
      
      * fix tracing vs -daemonize (Daniel)
      * detect invalid CFI configuration (Daniele)
      * 32-bit PVH fix (David)
      * forward SCSI passthrough host-status to the SCSI HBA (Hannes)
      * detect ill-formed id in QMP object-add (Kevin)
      * miscellaneous bugfixes and cleanups (Keqian, Kostiantyn, myself, Peng Liang)
      * add nodelay option for chardev (myself)
      * deprecate -M kernel-irqchip=off on x86 (myself)
      * keep .d files (myself)
      * Fix -trace file (myself)
      
      # gpg: Signature made Sat 06 Mar 2021 10:43:12 GMT
      # gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
      # gpg:                issuer "pbonzini@redhat.com"
      # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
      # gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
      # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
      #      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83
      
      * remotes/bonzini-gitlab/tags/for-upstream: (23 commits)
        meson: Stop if cfi is enabled with system slirp
        trace: skip qemu_set_log_filename if no "-D" option was passed
        trace: fix "-trace file=..."
        meson: adjust timeouts for some slower tests
        build-sys: invoke ninja with -d keepdepfile
        qemu-option: do not suggest using the delay option
        scsi: move host_status handling into SCSI drivers
        scsi: inline sg_io_sense_from_errno() into the callers.
        scsi-generic: do not snoop the output of failed commands
        scsi: Add mapping for generic SCSI_HOST status to sense codes
        scsi: Rename linux-specific SG_ERR codes to generic SCSI_HOST error codes
        qemu-config: add error propagation to qemu_config_parse
        x86/pvh: extract only 4 bytes of start address for 32 bit kernels
        elf_ops: correct loading of 32 bit PVH kernel
        lsilogic: Use PCIDevice::exit instead of DeviceState::unrealize
        accel: kvm: Add aligment assert for kvm_log_clear_one_slot
        accel: kvm: Fix memory waste under mismatch page size
        vl.c: do not execute trace_init_backends() before daemonizing
        qom: Check for wellformed id in user_creatable_add_type()
        chardev: add nodelay option
        ...
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      0436c55e
    • Peter Maydell's avatar
      Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210308' into staging · 138d2931
      Peter Maydell authored
      
      target-arm queue:
       * sbsa-ref: remove cortex-a53 from list of supported cpus
       * sbsa-ref: add 'max' to list of allowed cpus
       * target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe
       * npcm7xx: add EMC model
       * xlnx-zynqmp: Remove obsolete 'has_rpu' property
       * target/arm: Speed up aarch64 TBL/TBX
       * virtio-mmio: improve virtio-mmio get_dev_path alog
       * target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks
       * target/arm: Restrict v8M IDAU to TCG
       * target/arm/cpu: Update coding style to make checkpatch.pl happy
       * musicpal, tc6393xb, omap_lcdc, tcx: drop dead code for non-32-bit-RGB surfaces
       * Add new board: mps3-an524
      
      # gpg: Signature made Mon 08 Mar 2021 11:56:24 GMT
      # gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
      # gpg:                issuer "peter.maydell@linaro.org"
      # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
      # gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
      # gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
      # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE
      
      * remotes/pmaydell/tags/pull-target-arm-20210308: (49 commits)
        hw/arm/mps2: Update old infocenter.arm.com URLs
        docs/system/arm/mps2.rst: Document the new mps3-an524 board
        hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524
        hw/arm/mps2-tz: Stub out USB controller for mps3-an524
        hw/arm/mps2-tz: Add new mps3-an524 board
        hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo
        hw/arm/mps2-tz: Support ROMs as well as RAMs
        hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data
        hw/arm/mps2-tz: Make RAM arrangement board-specific
        hw/arm/mps2-tz: Allow boards to have different PPCInfo data
        hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs
        hw/arm/mps2-tz: Move device IRQ info to data structures
        hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrupts
        hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI
        hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524
        hw/arm/mps2-tz: Make number of IRQs board-specific
        hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board type
        hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board
        hw/misc/mps2-fpgaio: Support SWITCH register
        hw/misc/mps2-fpgaio: Make number of LEDs configurable by board
        ...
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      138d2931
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