- Jan 06, 2022
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Cindy Lu authored
Add the functions to support the configure interrupt in virtio The function virtio_config_guest_notifier_read will notify the guest if there is an configure interrupt. The function virtio_config_set_guest_notifier_fd_handler is to set the fd hander for the notifier Signed-off-by:
Cindy Lu <lulu@redhat.com> Message-Id: <20211104164827.21911-7-lulu@redhat.com> Reviewed-by:
Michael S. Tsirkin <mst@redhat.com> Signed-off-by:
Michael S. Tsirkin <mst@redhat.com>
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Cindy Lu authored
Add new call back function in vhost-vdpa, this function will set the event fd to kernel. This function will be called in the vhost_dev_start and vhost_dev_stop Signed-off-by:
Cindy Lu <lulu@redhat.com> Message-Id: <20211104164827.21911-6-lulu@redhat.com> Reviewed-by:
Michael S. Tsirkin <mst@redhat.com> Signed-off-by:
Michael S. Tsirkin <mst@redhat.com>
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Cindy Lu authored
This patch introduces new VhostOps vhost_set_config_call. This function allows the vhost to set the event fd to kernel Signed-off-by:
Cindy Lu <lulu@redhat.com> Message-Id: <20211104164827.21911-5-lulu@redhat.com> Reviewed-by:
Michael S. Tsirkin <mst@redhat.com> Signed-off-by:
Michael S. Tsirkin <mst@redhat.com>
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Cindy Lu authored
To reuse the interrupt process in configure interrupt Need to decouple the single vector from the interrupt process. Add new function kvm_virtio_pci_vector_use_one and _release_one. These functions are use for the single vector, the whole process will finish in a loop for the vq number. Signed-off-by:
Cindy Lu <lulu@redhat.com> Message-Id: <20211104164827.21911-4-lulu@redhat.com> Reviewed-by:
Michael S. Tsirkin <mst@redhat.com> Signed-off-by:
Michael S. Tsirkin <mst@redhat.com>
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Cindy Lu authored
To reuse the notifier process in configure interrupt. Use the virtio_pci_get_notifier function to get the notifier. the INPUT of this function is the IDX, the OUTPUT is notifier and the vector Signed-off-by:
Cindy Lu <lulu@redhat.com> Message-Id: <20211104164827.21911-3-lulu@redhat.com> Reviewed-by:
Michael S. Tsirkin <mst@redhat.com> Signed-off-by:
Michael S. Tsirkin <mst@redhat.com>
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Cindy Lu authored
To support configure interrupt for vhost-vdpa Introduce VIRTIO_CONFIG_IRQ_IDX -1 as configure interrupt's queue index, Then we can reuse the functions guest_notifier_mask and guest_notifier_pending. Add the check of queue index in these drivers, if the driver does not support configure interrupt, the function will just return Signed-off-by:
Cindy Lu <lulu@redhat.com> Message-Id: <20211104164827.21911-2-lulu@redhat.com> Reviewed-by:
Michael S. Tsirkin <mst@redhat.com> Signed-off-by:
Michael S. Tsirkin <mst@redhat.com>
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Michael S. Tsirkin authored
When bus is looked up on a pci write, we didn't validate that the lookup succeeded. Fuzzers thus can trigger QEMU crash by dereferencing the NULL bus pointer. Fixes: b32bd763 ("pci: introduce acpi-index property for PCI device") Fixes: CVE-2021-4158 Cc: "Igor Mammedov" <imammedo@redhat.com> Fixes: https://gitlab.com/qemu-project/qemu/-/issues/770 Signed-off-by:
Michael S. Tsirkin <mst@redhat.com> Reviewed-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by:
Ani Sinha <ani@anisinha.ca>
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David Hildenbrand authored
If we warn about the block size being smaller than the default, we skip some alignment checks. This can currently only fail on x86-64, when specifying a block size of 1 MiB, however, we detect the THP size of 2 MiB. Fixes: 228957fe ("virtio-mem: Probe THP size to determine default block size") Cc: "Michael S. Tsirkin" <mst@redhat.com> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20211011173305.13778-1-david@redhat.com> Reviewed-by:
Michael S. Tsirkin <mst@redhat.com> Signed-off-by:
Michael S. Tsirkin <mst@redhat.com>
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- Jan 05, 2022
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https://gitlab.com/thuth/qemuRichard Henderson authored
* Add compat machines for 7.0 * Some minor qtest and unit test improvements * Remove -no-quit option * Fixes for the docs # gpg: Signature made Wed 05 Jan 2022 02:10:49 AM PST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [undefined] # gpg: aka "Thomas Huth <thuth@redhat.com>" [undefined] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * tag 'pull-request-2022-01-05' of https://gitlab.com/thuth/qemu : docs/tools/qemu-trace-stap.rst: Do not hard-code the QEMU binary name gitlab-ci: Enable docs in the centos job docs/sphinx: fix compatibility with sphinx < 1.8 qemu-options: Remove the deprecated -no-quit option tests/unit/test-util-sockets: Use g_file_open_tmp() to create temp file tests/qtest/hd-geo-test: Check for the lsi53c895a controller before using it tests/qtest/test-x86-cpuid-compat: Check for machines before using them hw: Add compat machines for 7.0 Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Thomas Huth authored
In downstream, we want to use a different name for the QEMU binary, and some people might also use the docs for non-x86 binaries, that's why we already created the |qemu_system| placeholder in the past. Use it now in the stap trace doc, too. Message-Id: <20220104103319.179870-1-thuth@redhat.com> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Thomas Huth authored
We just ran into a problem that the docs don't build on RHEL8 / CentOS 8 anymore. Seems like these distros are using one of the oldest Sphinx versions that we still have to support. Thus enable the docs build in the CI on CentOS so that such bugs don't slip in so easily again. Message-Id: <20220104091240.160867-1-thuth@redhat.com> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Marc-André Lureau authored
SphinxDirective was added with sphinx 1.8 (2018-09-13). Reported-by:
Thomas Huth <thuth@redhat.com> Signed-off-by:
Marc-André Lureau <marcandre.lureau@redhat.com> Tested-by:
Thomas Huth <thuth@redhat.com> Message-Id: <20220104074649.1712440-1-marcandre.lureau@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Thomas Huth authored
This option was just a wrapper around the -display ...,window-close=off parameter, and the name "no-quit" is rather confusing compared to "window-close" (since there are still other means to quit the emulator), so let's remove this now. Message-Id: <20211215082417.180735-1-thuth@redhat.com> Acked-by:
Michal Prívozník <mprivozn@redhat.com> Reviewed-by:
Markus Armbruster <armbru@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Philippe Mathieu-Daudé authored
Similarly to commit e63ed64c ("tests/qtest/virtio-net-failover: Use g_file_open_tmp() to create temporary file"), avoid calling g_test_rand_int() before g_test_init(): use g_file_open_tmp(). Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211224234504.3413370-1-philmd@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Thomas Huth authored
The lsi53c895a SCSI controller might have been disabled in the target binary, so let's check for its availability first before using it. Message-Id: <20211222153600.976588-1-thuth@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Thomas Huth authored
The user might have disabled the pc-i440fx machine type (or it's older versions, like done in downstream RHEL) in the QEMU binary, so let's better check whether the machine types are available before using them. Message-Id: <20211222153923.1000420-1-thuth@redhat.com> Reviewed-by:
Igor Mammedov <imammedo@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Cornelia Huck authored
Add 7.0 machine types for arm/i440fx/q35/s390x/spapr. Signed-off-by:
Cornelia Huck <cohuck@redhat.com> Reviewed-by:
Juan Quintela <quintela@redhat.com> Reviewed-by:
Andrew Jones <drjones@redhat.com> Reviewed-by:
Daniel P. Berrangé <berrange@redhat.com> Reviewed-by:
Christian Borntraeger <borntraeger@de.ibm.com> Acked-by:
Cédric Le Goater <clg@kaod.org> Message-Id: <20211217143948.289995-1-cohuck@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Richard Henderson authored
Brown bag time: offset 0 from esp is the return address, offset 4 is the first argument. Fixes: d7478d42 ("common-user: Fix tail calls to safe_syscall_set_errno_tail") Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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https://gitlab.com/rth7680/qemuRichard Henderson authored
Fix for safe_syscall_base. Fix for folding of vector add/sub. Fix build on loongarch64 with gcc 8. Remove decl for qemu_run_machine_init_done_notifiers. # gpg: Signature made Tue 04 Jan 2022 04:39:35 PM PST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-tcg-20220104' of https://gitlab.com/rth7680/qemu : common-user: Fix tail calls to safe_syscall_set_errno_tail sysemu: Cleanup qemu_run_machine_init_done_notifiers() linux-user: Fix trivial build error on loongarch64 hosts tcg/optimize: Fix folding of vector ops Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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- Jan 04, 2022
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Richard Henderson authored
For the ABIs in which the syscall return register is not also the first function argument register, move the errno value into the correct place. Fixes: a3310c03 ("linux-user: Move syscall error detection into safe_syscall_base") Reported-by:
Laurent Vivier <laurent@vivier.eu> Tested-by:
Laurent Vivier <laurent@vivier.eu> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220104190454.542225-1-richard.henderson@linaro.org>
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Xiaoyao Li authored
Remove qemu_run_machine_init_done_notifiers() since no implementation and user. Fixes: f66dc873 ("vl: move all generic initialization out of vl.c") Signed-off-by:
Xiaoyao Li <xiaoyao.li@intel.com> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220104024136.1433545-1-xiaoyao.li@intel.com> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Philippe Mathieu-Daudé authored
When building using GCC 8.3.0 on loongarch64 (Loongnix) we get: In file included from ../linux-user/signal.c:33: ../linux-user/host/loongarch64/host-signal.h: In function ‘host_signal_write’: ../linux-user/host/loongarch64/host-signal.h:57:9: error: a label can only be part of a statement and a declaration is not a statement uint32_t sel = (insn >> 15) & 0b11111111111; ^~~~~~~~ We don't use the 'sel' variable more than once, so drop it. Meson output for the record: Host machine cpu family: loongarch64 Host machine cpu: loongarch64 C compiler for the host machine: cc (gcc 8.3.0 "cc (Loongnix 8.3.0-6.lnd.vec.27) 8.3.0") C linker for the host machine: cc ld.bfd 2.31.1-system Fixes: ad812c3b ("linux-user: Implement CPU-specific signal handler for loongarch64 hosts") Reported-by:
Song Gao <gaosong@loongson.cn> Suggested-by:
Song Gao <gaosong@loongson.cn> Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
WANG Xuerui <git@xen0n.name> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220104215027.2180972-1-f4bug@amsat.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Bitwise operations are easy to fold, because the operation is identical regardless of element size. But add and sub need extra element size info that is not currently propagated. Fixes: 2f9f08ba Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/799 Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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https://github.com/legoater/qemuRichard Henderson authored
ppc 7.0 queue: * Cleanup of PowerNV PHBs (Daniel and Cedric) * Cleanup and fixes for PPC405 machine (Cedric) * Fix for xscvspdpn (Matheus) * Rework of powerpc exception handling 1/n (Fabiano) * Optimisation for PMU (Richard and Daniel) # gpg: Signature made Mon 03 Jan 2022 11:04:06 PM PST # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-ppc-20220104' of https://github.com/legoater/qemu : (26 commits) target/ppc: do not call hreg_compute_hflags() in helper_store_mmcr0() target/ppc: Use env->pnc_cyc_cnt target/ppc: Rewrite pmu_increment_insns target/ppc: Cache per-pmc insn and cycle count settings target/ppc: powerpc_excp: Stop passing excp_model around target/ppc: powerpc_excp: Move system call vectored code together target/ppc: powerpc_excp: Set vector earlier target/ppc: powerpc_excp: Add excp_vectors bounds check target/ppc: powerpc_excp: Set alternate SRRs directly target/ppc: do not silence snan in xscvspdpn ppc/ppc405: Dump specific registers ppc/ppc405: Introduce a store helper for SPR_40x_PID ppc/ppc405: Fix timer initialization ppc/ppc405: Rework ppc_40x_timers_init() to use a PowerPCCPU ppc/ppc405: Restore TCR and STR write handlers ppc/ppc405: Activate MMU logs ppc/ppc4xx: Convert printfs() target/ppc: Print out literal exception names in logs target/ppc: Remove static inline target/ppc: Check effective address validity ... Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Daniel Henrique Barboza authored
MMCR0 writes will change only MMCR0 bits which are used to calculate HFLAGS_PMCC0, HFLAGS_PMCC1 and HFLAGS_INSN_CNT hflags. No other machine register will be changed during this operation. This means that hreg_compute_hflags() is overkill for what we need to do. pmu_update_summaries() is already updating HFLAGS_INSN_CNT without calling hreg_compure_hflags(). Let's do the same for the other 2 MMCR0 hflags. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220103224746.167831-5-danielhb413@gmail.com> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Richard Henderson authored
Use the cached pmc_cyc_cnt value in pmu_update_cycles and pmc_update_overflow_timer. This leaves pmc_get_event and pmc_is_inactive unused, so remove them. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220103224746.167831-4-danielhb413@gmail.com> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Richard Henderson authored
Use the cached pmc_ins_cnt value. Unroll the loop over the different PMC counters. Treat the PMC4 run-latch specially. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220103224746.167831-3-danielhb413@gmail.com> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Richard Henderson authored
This is the combination of frozen bit and counter type, on a per counter basis. So far this is only used by HFLAGS_INSN_CNT, but will be used more later. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> [danielhb: fixed PMC4 cyc_cnt shift, insn run latch code, MMCR0_FC handling, "PMC[1-6]" comment] Signed-off-by:
Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20220103224746.167831-2-danielhb413@gmail.com> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Fabiano Rosas authored
We can just access it directly in powerpc_excp. Signed-off-by:
Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by:
Cédric Le Goater <clg@kaod.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
David Gibson <david@gibson.dropbear.id.au> [ clg: Took into account removal of inline ] Message-Id: <20211229165751.3774248-6-farosas@linux.ibm.com> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Fabiano Rosas authored
Now that 'vector' is known before calling the interrupt-specific setup code, we can move all of the scv setup into one place. No functional change intended. Signed-off-by:
Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by:
Cédric Le Goater <clg@kaod.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20211229165751.3774248-5-farosas@linux.ibm.com> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Fabiano Rosas authored
None of the interrupt setup code touches 'vector', so we can move it earlier in the function. This will allow us to later move the System Call Vectored setup that is on the top level into the POWERPC_EXCP_SYSCALL_VECTORED code block. This patch also moves the verification for when 'excp' does not have an address associated with it. We now bail a little earlier when that is the case. This should not cause any visible effects. Signed-off-by:
Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by:
Cédric Le Goater <clg@kaod.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
David Gibson <david@gibson.dropbear.id.au> Message-Id: <20211229165751.3774248-4-farosas@linux.ibm.com> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Fabiano Rosas authored
The next patch will start accessing the excp_vectors array earlier in the function, so add a bounds check as first thing here. This converts the empty return on POWERPC_EXCP_NONE to an error. This exception number never reaches this function and if it does it probably means something else went wrong up the line. Signed-off-by:
Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by:
Cédric Le Goater <clg@kaod.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
David Gibson <david@gibson.dropbear.id.au> Message-Id: <20211229165751.3774248-3-farosas@linux.ibm.com> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Fabiano Rosas authored
There are currently only two interrupts that use alternate SRRs, so let them write to them directly during the setup code. No functional change intended. Signed-off-by:
Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Cédric Le Goater <clg@kaod.org> Reviewed-by:
David Gibson <david@gibson.dropbear.id.au> Message-Id: <20211229165751.3774248-2-farosas@linux.ibm.com> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Matheus Ferst authored
The non-signalling versions of VSX scalar convert to shorter/longer precision insns doesn't silence SNaNs in the hardware. To better match this behavior, use the non-arithmatic conversion of helper_todouble instead of float32_to_float64. A test is added to prevent future regressions. Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20211228120310.1957990-1-matheus.ferst@eldorado.org.br> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Cédric Le Goater authored
Rework slightly ppc_cpu_dump_state() to replace the various 'if' statements with a 'switch'. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org> Message-Id: <20211222064025.1541490-9-clg@kaod.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org> Message-Id: <20220103063441.3424853-10-clg@kaod.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Cédric Le Goater authored
The PID SPR of the 405 CPU contains the translation ID of the TLB which is a 8-bit field. Enforce the mask with a store helper. Cc: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org> Message-Id: <20211222064025.1541490-8-clg@kaod.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org> Message-Id: <20220103063441.3424853-9-clg@kaod.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Cédric Le Goater authored
Timers are already initialized in ppc4xx_init(). No need to do it a second time with a wrong set. Fixes: d715ea96 ("PPC: 405: Fix ppc405ep initialization") Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org> Message-Id: <20211222064025.1541490-7-clg@kaod.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org> Message-Id: <20220103063441.3424853-8-clg@kaod.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Cédric Le Goater authored
This is a small cleanup to ease reading. It includes the removal of a check done on the returned value of g_malloc0(), which can not fail. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org> Message-Id: <20211222064025.1541490-6-clg@kaod.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org> Message-Id: <20220103063441.3424853-7-clg@kaod.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Cédric Le Goater authored
The 405 timers were broken when booke support was added. Assumption was made that the register numbers were the same but it's not : SPR_BOOKE_TSR (0x150) SPR_BOOKE_TCR (0x154) SPR_40x_TSR (0x3D8) SPR_40x_TCR (0x3DA) Cc: Christophe Leroy <christophe.leroy@c-s.fr> Fixes: ddd1055b ("PPC: booke timers") Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org> Message-Id: <20211222064025.1541490-5-clg@kaod.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org> Message-Id: <20220103063441.3424853-6-clg@kaod.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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Cédric Le Goater authored
There is no need to deactivate MMU logging at compile time. Remove all use of defines. Only keep DUMP_PAGE_TABLES for another series since page tables could be dumped from the monitor. Signed-off-by:
Cédric Le Goater <clg@kaod.org> Message-Id: <20211222064025.1541490-4-clg@kaod.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220103063441.3424853-5-clg@kaod.org> Signed-off-by:
Cédric Le Goater <clg@kaod.org>
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