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  1. Mar 06, 2023
  2. Mar 04, 2023
    • Thomas Huth's avatar
      configure: Disable thread-safety warnings on macOS · 2946e1af
      Thomas Huth authored
      
      The enablement of -Wthread-safety broke compilation on macOS (if
      -Werror is enabled, like in our CI). Disable it there by default
      until the problems are resolved.
      
      Signed-off-by: default avatarThomas Huth <thuth@redhat.com>
      Acked-by: default avatarKevin Wolf <kwolf@redhat.com>
      Message-id: 20230301113425.286946-1-thuth@redhat.com
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      2946e1af
    • Peter Maydell's avatar
      tests/qtest/migration-test: Disable migration/multifd/tcp/plain/cancel · c15d9e23
      Peter Maydell authored
      migration-test has been flaky for a long time, both in CI and
      otherwise:
      
      https://gitlab.com/qemu-project/qemu/-/jobs/3806090216
      (a FreeBSD job)
        32/648 ERROR:../tests/qtest/migration-helpers.c:205:wait_for_migration_status: assertion failed: (g_test_timer_elapsed() < MIGRATION_STATUS_WAIT_TIMEOUT) ERROR
      
      on a local macos x86 box:
      :arrow_forward:  34/621 ERROR:../../tests/qtest/migration-helpers.c:151:migrate_query_not_failed: assertion failed: (!g_str_equal(status, "failed")) ERROR
       34/621 qemu:qtest+qtest-i386 / qtest-i386/migration-test                         ERROR          168.12s   killed by signal 6 SIGABRT
      ――――――――――――――――――――――――――――――――――――― ✀  ―――――――――――――――――――――――――――――――――――――
      stderr:
      qemu-system-i386: Failed to peek at channel
      query-migrate shows failed migration: Unable to write to socket: Broken pipe
      **
      ERROR:../../tests/qtest/migration-helpers.c:151:migrate_query_not_failed: assertion failed: (!g_str_equal(status, "failed"))
      
      (test program exited with status code -6)
      ――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――
      
      :arrow_forward:
      
        37/621 ERROR:../../tests/qtest/migration-helpers.c:151:migrate_query_not_failed: assertion failed: (!g_str_equal(status, "failed")) ERROR
       37/621 qemu:qtest+qtest-x86_64 / qtest-x86_64/migration-test                     ERROR          174.37s   killed by signal 6 SIGABRT
      ――――――――――――――――――――――――――――――――――――― ✀  ―――――――――――――――――――――――――――――――――――――
      stderr:
      query-migrate shows failed migration: Unable to write to socket: Broken pipe
      **
      ERROR:../../tests/qtest/migration-helpers.c:151:migrate_query_not_failed: assertion failed: (!g_str_equal(status, "failed"))
      
      (test program exited with status code -6)
      
      In the cases where I've looked at the underlying log, this seems to
      be in the migration/multifd/tcp/plain/cancel subtest.  Disable that
      specific subtest by default until somebody can track down the
      underlying cause. Enthusiasts can opt back in by setting
      QEMU_TEST_FLAKY_TESTS=1 in their environment.
      
      We might need to disable more parts of this test if this isn't
      sufficient to fix the flakiness.
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      Reviewed-by: default avatarDr. David Alan Gilbert <dgilbert@redhat.com>
      Reviewed-by: default avatarJuan Quintela <quintela@redhat.com>
      Acked-by: default avatarThomas Huth <thuth@redhat.com>
      Message-id: 20230302172211.4146376-1-peter.maydell@linaro.org
      c15d9e23
    • Peter Maydell's avatar
      Merge tag 'pull-ppc-20230303' of https://gitlab.com/danielhb/qemu into staging · ca30a985
      Peter Maydell authored
      ppc patch queue for 2023-03-03:
      
      This queue includes a stub implementation for the dcblc instruction to
      avoid an illegal instrunction exception when using u-boot with mpc85xx.
      It also includes a PHB fix with user-created pnv-phb devices and
      Skiboot.
      
      # -----BEGIN PGP SIGNATURE-----
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      # -----END PGP SIGNATURE-----
      # gpg: Signature made Fri 03 Mar 2023 21:24:38 GMT
      # gpg:                using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164
      # gpg:                issuer "danielhb413@gmail.com"
      # gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown]
      # gpg: WARNING: This key is not certified with a trusted signature!
      # gpg:          There is no indication that the signature belongs to the owner.
      # Primary key fingerprint: 17EB FF99 23D0 1800 AF28  3819 3CD9 CA96 DE03 3164
      
      * tag 'pull-ppc-20230303' of https://gitlab.com/danielhb/qemu
      
      :
        pnv_phb4_pec: Simplify/align code to parent user-created PHBs
        pnv_phb4_pec: Move pnv_phb4_get_pec() to rightful file
        pnv_phb4_pec: Only export existing PHBs to the device tree
        pnv_phb4_pec: Keep track of instantiated PHBs
        target/ppc/translate: Add dummy implementation for dcblc instruction
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      ca30a985
  3. Mar 03, 2023
    • Frederic Barrat's avatar
      pnv_phb4_pec: Simplify/align code to parent user-created PHBs · ddf0676f
      Frederic Barrat authored
      
      When instantiating a user-created PHB on P9/P10, we don't really have
      a reason any more to go through an indirection in pnv_chip_add_phb()
      in pnv.c, we can go straight to the right function in
      pnv_phb4_pec.c. That way, default PHBs and user-created PHBs are all
      handled in the same file.  This patch also renames pnv_phb4_get_pec()
      to pnv_pec_add_phb() to better reflect that it "hooks" a PHB to a PEC.
      
      For P8, the PHBs are parented to the chip directly, so it makes sense
      to keep calling pnv_chip_add_phb() in pnv.c, to also be consistent
      with where default PHBs are handled. The only change here is that,
      since that function is now only used for P8, we can refine the return
      type.
      
      So overall, the PnvPHB front-end now has a pnv_phb_user_get_parent()
      function which handles the parenting of the user-created PHBs by
      calling the right function in the right file based on the processor
      version. It's also easily extensible if we ever need to support a
      different parent object.
      
      Signed-off-by: default avatarFrederic Barrat <fbarrat@linux.ibm.com>
      Message-Id: <20230302163715.129635-5-fbarrat@linux.ibm.com>
      Reviewed-by: default avatarDaniel Henrique Barboza <danielhb413@gmail.com>
      Signed-off-by: default avatarDaniel Henrique Barboza <danielhb413@gmail.com>
      ddf0676f
    • Frederic Barrat's avatar
      pnv_phb4_pec: Move pnv_phb4_get_pec() to rightful file · fa9dc22a
      Frederic Barrat authored
      
      The function pnv_phb4_get_pec() exposes some internals of the PEC and
      PHB logic, yet it was in the higher level hw/ppc/pnv.c file for
      historical reasons: P8 implements the PHBs from pnv.c directly, but on
      P9/P10, it's done through the CEC model, which has its own file. So
      move pnv_phb4_get_pec() to hw/pci-host/pnv_phb4_pec.c, where it fits
      naturally.
      
      While at it, replace the PnvPHB4 parameter by the PnvPHB front-end,
      since it has all the information needed and simplify it a bit.
      
      No functional changes.
      
      Signed-off-by: default avatarFrederic Barrat <fbarrat@linux.ibm.com>
      Message-Id: <20230302163715.129635-4-fbarrat@linux.ibm.com>
      Reviewed-by: default avatarDaniel Henrique Barboza <danielhb413@gmail.com>
      Signed-off-by: default avatarDaniel Henrique Barboza <danielhb413@gmail.com>
      fa9dc22a
    • Frederic Barrat's avatar
      pnv_phb4_pec: Only export existing PHBs to the device tree · cd9b1cf9
      Frederic Barrat authored
      
      So far, we were always exporting all possible PHBs to the device
      tree. It works well when using the default config but it potentially
      adds non-existing devices when using '-nodefaults' and user-created
      PHBs, causing the firmware (skiboot) to report errors when probing
      those PHBs. This patch only exports PHBs which have been realized to
      the device tree.
      
      Fixes: d786be3f ("ppc/pnv: enable user created pnv-phb for powernv9")
      Signed-off-by: default avatarFrederic Barrat <fbarrat@linux.ibm.com>
      Message-Id: <20230302163715.129635-3-fbarrat@linux.ibm.com>
      Reviewed-by: default avatarDaniel Henrique Barboza <danielhb413@gmail.com>
      Signed-off-by: default avatarDaniel Henrique Barboza <danielhb413@gmail.com>
      cd9b1cf9
    • Frederic Barrat's avatar
      pnv_phb4_pec: Keep track of instantiated PHBs · 1068ebb6
      Frederic Barrat authored
      
      Add an array on the PEC object to keep track of the PHBs which are
      instantiated. The array can be sparsely populated when using
      user-created PHBs. It will be useful for the next patch to only export
      instantiated PHBs in the device tree.
      
      Reviewed-by: default avatarDaniel Henrique Barboza <danielhb413@gmail.com>
      Signed-off-by: default avatarFrederic Barrat <fbarrat@linux.ibm.com>
      Message-Id: <20230302163715.129635-2-fbarrat@linux.ibm.com>
      Signed-off-by: default avatarDaniel Henrique Barboza <danielhb413@gmail.com>
      1068ebb6
    • Bernhard Beschow's avatar
      target/ppc/translate: Add dummy implementation for dcblc instruction · e64645ba
      Bernhard Beschow authored
      The dcblc instruction is used by u-boot in mpc85xx/start.S. Without it,
      an illegal istruction exception is generated very early in the boot
      process where the processor is not yet able to handle exceptions. See:
      
      https://github.com/u-boot/u-boot/blob/v2023.01/arch/powerpc/cpu/mpc85xx/start.S#L1840
      
      
      
      Signed-off-by: default avatarBernhard Beschow <shentey@gmail.com>
      Message-Id: <20230130184950.5241-1-shentey@gmail.com>
      Acked-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Reviewed-by: default avatarDaniel Henrique Barboza <danielhb413@gmail.com>
      Signed-off-by: default avatarDaniel Henrique Barboza <danielhb413@gmail.com>
      e64645ba
    • Peter Maydell's avatar
      Merge tag 'pull-aspeed-20230302' of https://github.com/legoater/qemu into staging · cad8db98
      Peter Maydell authored
      aspeed queue:
      
      * fix for the Aspeed I2C slave mode
      * a new I2C echo device from Klaus and its associated test in avocado.
      * initial SoC cleanups to allow the use of block devices instead of
        drives on the command line.
      * new facebook machines and eeprom fixes for the Fuji
      * readline fix
      
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      # gpg: Signature made Thu 02 Mar 2023 13:03:48 GMT
      # gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
      # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
      # gpg: WARNING: This key is not certified with a trusted signature!
      # gpg:          There is no indication that the signature belongs to the owner.
      # Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1
      
      * tag 'pull-aspeed-20230302' of https://github.com/legoater/qemu
      
      :
        aspeed/smc: Replace SysBus IRQs with GPIO lines
        aspeed: Add a boot_rom overlap region in the SoC spi_boot container
        aspeed: Introduce a spi_boot region under the SoC
        aspeed/fuji : correct the eeprom size
        hw/at24c : modify at24c to support 1 byte address mode
        hw/arm/aspeed: Adding new machine Tiogapass in QEMU
        hw/arm/aspeed: Adding new machine Yosemitev2 in QEMU
        tests/avocado/machine_aspeed.py: Add an I2C slave test
        hw/misc: add a toy i2c echo device
        hw/i2c: only schedule pending master when bus is idle
        readline: fix hmp completion issue
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      cad8db98
    • Peter Maydell's avatar
      Merge tag 'pull-loongarch-20230303' of https://gitlab.com/gaosong/qemu into staging · bfbcaae9
      Peter Maydell authored
      pull-loongarch-20230303
      
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      # gpg: Signature made Fri 03 Mar 2023 02:31:03 GMT
      # gpg:                using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF
      # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown]
      # gpg: WARNING: This key is not certified with a trusted signature!
      # gpg:          There is no indication that the signature belongs to the owner.
      # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C  6C2C 40A2 FFF2 3926 3EDF
      
      * tag 'pull-loongarch-20230303' of https://gitlab.com/gaosong/qemu
      
      :
        hw/loongarch/virt: add system_powerdown hmp command support
        target/loongarch: Implement Chip Configuraiton Version Register(0x0000)
        docs/system/loongarch: update loongson3.rst and rename it to virt.rst
        loongarch: Add smbios command line option.
        hw/loongarch/virt: rename PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASE
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      bfbcaae9
    • Peter Maydell's avatar
      Merge tag 'migration-20230302-pull-request' of https://gitlab.com/juan.quintela/qemu into staging · 43b79f3b
      Peter Maydell authored
      Migraiton Pull request
      
      Hi
      
      This pull requests include:
      - use-after-free in test-vmstate (eric)
      - fix exec migration in windows (berberian)
      
      Please apply.
      
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      # gpg: Signature made Thu 02 Mar 2023 16:10:29 GMT
      # gpg:                using RSA key 1899FF8EDEBF58CCEE034B82F487EF185872D723
      # gpg: Good signature from "Juan Quintela <quintela@redhat.com>" [full]
      # gpg:                 aka "Juan Quintela <quintela@trasno.org>" [full]
      # Primary key fingerprint: 1899 FF8E DEBF 58CC EE03  4B82 F487 EF18 5872 D723
      
      * tag 'migration-20230302-pull-request' of https://gitlab.com/juan.quintela/qemu
      
      :
        Fix exec migration on Windows (w32+w64).
        test-vmstate: fix bad GTree usage, use-after-free
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      43b79f3b
    • Peter Maydell's avatar
      Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging · 66577e9e
      Peter Maydell authored
      
      virtio,pc,pci: features, cleanups, fixes
      
      vhost-user support without ioeventfd
      word replacements in vhost user spec
      shpc improvements
      
      cleanups, fixes all over the place
      
      Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>
      
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      # gpg: Signature made Fri 03 Mar 2023 00:13:56 GMT
      # gpg:                using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
      # gpg:                issuer "mst@redhat.com"
      # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
      # gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [full]
      # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
      #      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469
      
      * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu
      
      : (53 commits)
        tests/data/acpi/virt: drop (most) duplicate files.
        hw/cxl/mailbox: Use new UUID network order define for cel_uuid
        qemu/uuid: Add UUID static initializer
        qemu/bswap: Add const_le64()
        tests: acpi: Update q35/DSDT.cxl for removed duplicate UID
        hw/i386/acpi: Drop duplicate _UID entry for CXL root bridge
        tests/acpi: Allow update of q35/DSDT.cxl
        hw/cxl: Add CXL_CAPACITY_MULTIPLIER definition
        hw/cxl: set cxl-type3 device type to PCI_CLASS_MEMORY_CXL
        hw/pci-bridge/cxl_downstream: Fix type naming mismatch
        hw/mem/cxl_type3: Improve error handling in realize()
        MAINTAINERS: Add Fan Ni as Compute eXpress Link QEMU reviewer
        intel-iommu: send UNMAP notifications for domain or global inv desc
        smmu: switch to use memory_region_unmap_iommu_notifier_range()
        memory: introduce memory_region_unmap_iommu_notifier_range()
        intel-iommu: fail DEVIOTLB_UNMAP without dt mode
        intel-iommu: fail MAP notifier without caching mode
        memory: Optimize replay of guest mapping
        chardev/char-socket: set s->listener = NULL in char_socket_finalize
        hw/pci: Trace IRQ routing on PCI topology
        ...
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      66577e9e
    • Peter Maydell's avatar
      Merge tag 'pull-riscv-to-apply-20230303' of https://gitlab.com/palmer-dabbelt/qemu into staging · 76116e28
      Peter Maydell authored
      Fifth RISC-V PR for QEMU 8.0
      
      * Experimantal support for writable misa.
      * Support for Svadu extension.
      * Support for the Zicond extension.
      * Fixes to gdbstub, CSR accesses, dependencies between the various
        floating-point exceptions, and XTheadMemPair.
      * Many cleanups.
      
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      # 0sVyDb2/TUFoXmClMwS6jZYQQwWD7tjjB7BDcvPJ0QKLblDoZFX5JyxpQypIKWcs
      # It/E6mk7aG0epH1GoB/mbHFDbeCm4tbo7Vf6cQGpV/vGWBUaOS67c5nenUK7Tlqw
      # NTr9qak+9NYVswvMHZ0lUKtO12W1g/1EVkict2/90P2snWbPZ+foWomifGNljmhy
      # 5WtCNp27uBKF/uuD9xubLOxSEcqtZFTuKJy7U3azV4I0IKfd6Is83Kd0IwBOrTgT
      # MYkFdtQE1jgbkXYVZjft6ymLuqJrcLFYwD8C2zdNAXJLk1Y+MCtGafgW6f6SkT6B
      # FrNaSOqQ9xXiaNStF2FwYdmZ476zcY+eEg2rH1grTwCMewZ9r7m3+H8iat/tR0pt
      # 9scYAre1oaL33LB6DGZi3JkssNYyj42sutcNao2hQXRHcsh+vv1dLR+Di2mO6Ji5
      # MNfvEgCrWWZjNVSwvhwCXdJPqqpyTbkRf8HJEp0gWvjk6VoF8sWidDw/8oMLj+wW
      # qZur7GNe+piJNvly85aFSL9J3SX7RyNeDzX/yK3b4k+g6I/ZziQaNgQtB9gYcm6w
      # mj3snCwRbEMEhdhPH0+Chm0Wb97knHJS14Vq9wCe2xh16o3HM5FspboLFkGZMjDV
      # tRDPFb7pitwdlA==
      # =FMkl
      # -----END PGP SIGNATURE-----
      # gpg: Signature made Fri 03 Mar 2023 08:24:21 GMT
      # gpg:                using RSA key 2B3C3747446843B24A943A7A2E1319F35FBB1889
      # gpg:                issuer "palmer@dabbelt.com"
      # gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown]
      # gpg:                 aka "Palmer Dabbelt <palmerdabbelt@google.com>" [unknown]
      # gpg: WARNING: This key is not certified with a trusted signature!
      # gpg:          There is no indication that the signature belongs to the owner.
      # Primary key fingerprint: 00CE 76D1 8349 60DF CE88  6DF8 EF4C A150 2CCB AB41
      #      Subkey fingerprint: 2B3C 3747 4468 43B2 4A94  3A7A 2E13 19F3 5FBB 1889
      
      * tag 'pull-riscv-to-apply-20230303' of https://gitlab.com/palmer-dabbelt/qemu
      
      : (59 commits)
        target/riscv/vector_helper.c: avoid env_archcpu() when reading RISCVCPUConfig
        target/riscv/vector_helper.c: create vext_set_tail_elems_1s()
        target/riscv/csr.c: avoid env_archcpu() usages when reading RISCVCPUConfig
        target/riscv/csr.c: use riscv_cpu_cfg() to avoid env_cpu() pointers
        target/riscv/csr.c: simplify mctr()
        target/riscv/csr.c: use env_archcpu() in ctr()
        target/riscv: Export Svadu property
        target/riscv: Add *envcfg.HADE related check in address translation
        target/riscv: Add *envcfg.PBMTE related check in address translation
        target/riscv: Add csr support for svadu
        target/riscv: Fix the relationship of PBMTE/STCE fields between menvcfg and henvcfg
        target/riscv: Fix the relationship between menvcfg.PBMTE/STCE and Svpbmt/Sstc extensions
        hw/riscv: Move the dtb load bits outside of create_fdt()
        hw/riscv: Skip re-generating DT nodes for a given DTB
        target/riscv: Add support for Zicond extension
        RISC-V: XTheadMemPair: Remove register restrictions for store-pair
        target/riscv: Fix checking of whether instruciton at 'pc_next' spans pages
        target/riscv: Group all predicate() routines together
        target/riscv: Drop priv level check in mseccfg predicate()
        target/riscv: Allow debugger to access sstc CSRs
        ...
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      76116e28
    • Song Gao's avatar
      hw/loongarch/virt: add system_powerdown hmp command support · 0d588c4f
      Song Gao authored
      
      For loongarch virt machine, add powerdown notification callback
      and send ACPI_POWER_DOWN_STATUS event by acpi ged. Also add
      acpi dsdt table for ACPI_POWER_BUTTON_DEVICE device in this
      patch.
      
      Reviewed-by: default avatarPhilippe Mathieu-Daudé <philmd@linaro.org>
      Signed-off-by: default avatarSong Gao <gaosong@loongson.cn>
      Message-Id: <20230303010548.295580-1-gaosong@loongson.cn>
    • Song Gao's avatar
      target/loongarch: Implement Chip Configuraiton Version Register(0x0000) · c77432d0
      Song Gao authored
      
      According to the 3A5000 manual 4.1 implement Chip Configuration
      Version Register(0x0000).
      
      Signed-off-by: default avatarSong Gao <gaosong@loongson.cn>
      Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Message-Id: <20230227071046.1445572-1-gaosong@loongson.cn>
    • Song Gao's avatar
      docs/system/loongarch: update loongson3.rst and rename it to virt.rst · 5f4c96b7
      Song Gao authored
      
      Since the EDK2 had already support LoongArch, update build bios,
      and update cpu type, cross-tools.
      
      Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Signed-off-by: default avatarSong Gao <gaosong@loongson.cn>
      Message-Id: <20230227035905.1290953-1-gaosong@loongson.cn>
    • Song Gao's avatar
      loongarch: Add smbios command line option. · 4934cc58
      Song Gao authored
      
      LoongArch has enabled CONFIG_SMBIOS, but didn't enable CLI '-smbios'.
      
      Fixes: 3efa6fa1 ("hw/loongarch: Add smbios support")
      Acked-by: default avatarMichael S. Tsirkin <mst@redhat.com>
      Reviewed-by: default avatarMarkus Armbruster <armbru@redhat.com>
      Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Signed-off-by: default avatarSong Gao <gaosong@loongson.cn>
      Message-Id: <20230227035905.1290953-2-gaosong@loongson.cn>
    • Bibo Mao's avatar
      hw/loongarch/virt: rename PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASE · 456eb81f
      Bibo Mao authored
      
      In theory gsi base can start from 0 on loongarch virt machine,
      however gsi base is hard-coded in linux kernel loongarch system,
      else system fails to boot.
      
      This patch renames macro PCH_PIC_IRQ_OFFSET with VIRT_GSI_BASE,
      keeps value unchanged. GSI base is common concept in acpi spec
      and easy to understand.
      
      Signed-off-by: default avatarBibo Mao <maobibo@loongson.cn>
      Reviewed-by: default avatarSong Gao <gaosong@loongson.cn>
      Message-Id: <20221228030719.991878-1-maobibo@loongson.cn>
      Signed-off-by: default avatarSong Gao <gaosong@loongson.cn>
    • Michael S. Tsirkin's avatar
      tests/data/acpi/virt: drop (most) duplicate files. · ee92a56b
      Michael S. Tsirkin authored
      
      When virt ACPI files were added, lots of duplicates were created because
      we forgot that there's a no-prefix fallback: e.g. if
      tests/data/acpi/virt/APIC.memhp is not there then test will use
      tests/data/acpi/virt/APIC.
      
      Drop these.
      
      These were found with
      $find tests/data/acpi/ -type f -exec sha256sum '{}' ';'|sort -d|uniq -w 64 --all-repeated=separate
      (trick: -d does a dictionary sort so a no-suffix file ends up first).
      
      Note: there are still a bunch of issues with duplicates left even after this.
      
      First pc and q35 are often identical.
      Second, sometimes files are identical but not identical to the default
      fallback, e.g.
      tests/data/acpi/pc/SLIT.cphp and tests/data/acpi/pc/SLIT.memhp
      or
      tests/data/acpi/q35/HMAT.acpihmat-noinitiator and tests/data/acpi/virt/HMAT.acpihmatvirt
      
      Finding a way to deduplicate these is still a TODO item - softlinks
      maybe?
      
      We also need to make rebuild-expected-aml.sh smarter about not creating
      these duplicates in the 1st place.
      
      And maybe we should use softlinks instead of relying on a fallback
      to make it explicit what version does each test expect?
      
      Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>
      ee92a56b
    • Ira Weiny's avatar
      hw/cxl/mailbox: Use new UUID network order define for cel_uuid · e16add2b
      Ira Weiny authored
      
      The cel_uuid was programatically generated previously because there was
      no static initializer for network order UUIDs.
      
      Use the new network order initializer for cel_uuid.  Adjust
      cxl_initialize_mailbox() because it can't fail now.
      
      Update specification reference.
      
      Reviewed-by: default avatarPhilippe Mathieu-Daudé <philmd@linaro.org>
      Reviewed-by: default avatarGregory Price <gregory.price@memverge.com>
      Tested-by: default avatarGregory Price <gregory.price@memverge.com>
      Signed-off-by: default avatarIra Weiny <ira.weiny@intel.com>
      Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
      
      Message-Id: <20230206172816.8201-11-Jonathan.Cameron@huawei.com>
      Reviewed-by: default avatarFan Ni <fan.ni@samsung.com>
      Reviewed-by: default avatarMichael S. Tsirkin <mst@redhat.com>
      Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>
      e16add2b
    • Ira Weiny's avatar
      qemu/uuid: Add UUID static initializer · 845476cb
      Ira Weiny authored
      
      UUID's are defined as network byte order fields.  No static initializer
      was available for UUID's in their standard big endian format.
      
      Define a big endian initializer for UUIDs.
      
      Reviewed-by: default avatarGregory Price <gregory.price@memverge.com>
      Tested-by: default avatarGregory Price <gregory.price@memverge.com>
      Signed-off-by: default avatarIra Weiny <ira.weiny@intel.com>
      Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
      Message-Id: <20230206172816.8201-10-Jonathan.Cameron@huawei.com>
      Reviewed-by: default avatarFan Ni <fan.ni@samsung.com>
      Reviewed-by: default avatarMichael S. Tsirkin <mst@redhat.com>
      Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>
      845476cb
    • Ira Weiny's avatar
      qemu/bswap: Add const_le64() · 845d80a8
      Ira Weiny authored
      
      Gcc requires constant versions of cpu_to_le* calls.
      
      Add a 64 bit version.
      
      Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      Reviewed-by: default avatarPhilippe Mathieu-Daudé <philmd@linaro.org>
      Reviewed-by: default avatarGregory Price <gregory.price@memverge.com>
      Tested-by: default avatarGregory Price <gregory.price@memverge.com>
      Signed-off-by: default avatarIra Weiny <ira.weiny@intel.com>
      Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
      
      Message-Id: <20230206172816.8201-9-Jonathan.Cameron@huawei.com>
      Reviewed-by: default avatarFan Ni <fan.ni@samsung.com>
      Reviewed-by: default avatarMichael S. Tsirkin <mst@redhat.com>
      Signed-off-by: default avatarMichael S. Tsirkin <mst@redhat.com>
      845d80a8
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