- Oct 06, 2022
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Alex Bennée authored
The API documentation is quite dry and doesn't flow nicely with the rest of the document. Move it to its own section at the bottom along with a little leader text to remind people to update it. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220929114231.583801-39-alex.bennee@linaro.org>
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Alex Bennée authored
We currently have the final binaries in the root of the build dir so the build prefix is superfluous. Additionally add a shell prompt to be more in line with the rest of the code. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220929114231.583801-38-alex.bennee@linaro.org>
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Richard Henderson authored
Coverity reports out-of-bound accesses here. This should be a false positive due to how the index is decoded from MemOpIdx. Fixes: Coverity CID 1487201 Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Damien Hedde <damien.hedde@greensocs.com> Message-Id: <20220401190233.329360-1-richard.henderson@linaro.org> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220929114231.583801-37-alex.bennee@linaro.org>
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Alex Bennée authored
Sometimes the whole execlog is just two much so add the ability to filter by instruction opcode or address. [AJB: this shows for example qemu-system-aarch64 -display none -serial mon:stdio \ -M virt -cpu max \ -semihosting-config enable=on \ -kernel ./tests/tcg/aarch64-softmmu/memory-sve \ -plugin ./contrib/plugins/libexeclog.so,ifilter=st1w,afilter=0x40001808 -d plugin -D plugin.out the st1w SVE instruction is not instrumenting its stores.] Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Alexandre Iooss <erdnaxe@crans.org> Cc: Robert Henry <robhenry@microsoft.com> Cc: Aaron Lindsay <aaron@os.amperecomputing.com> Message-Id: <20220929114231.583801-36-alex.bennee@linaro.org>
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Alex Bennée authored
This gets especially confusing if you start plugging in host addresses from a trace and you wonder why the output keeps changing. Report when read_memory_func fails instead of blindly disassembling the buffer contents. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220929114231.583801-35-alex.bennee@linaro.org>
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Alex Bennée authored
Rather than assembling our output piecemeal lets use the same approach as the plugin disas interface to build the disassembly string before printing it. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220929114231.583801-34-alex.bennee@linaro.org>
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Alex Bennée authored
This helps us construct strings elsewhere before echoing to the monitor. It avoids having to jump through hoops like: monitor_printf(mon, "%s", s->str); It will be useful in following patches but for now convert all existing plain "%s" printfs to use the _puts api. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Kevin Wolf <kwolf@redhat.com> Reviewed-by:
Markus Armbruster <armbru@redhat.com> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220929114231.583801-33-alex.bennee@linaro.org>
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Paolo Bonzini authored
Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-32-alex.bennee@linaro.org>
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Paolo Bonzini authored
Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-31-alex.bennee@linaro.org>
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Paolo Bonzini authored
Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-30-alex.bennee@linaro.org>
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Paolo Bonzini authored
s390-ccw remains a bit more complex, because the -march=z900 test is done only for the native cross compiler. Otherwise, all that is needed is to pass the (now mandatory) target argument to write_target_makefile. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-29-alex.bennee@linaro.org>
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Paolo Bonzini authored
Remove the symlink to tests/tcg/config-*.mak, which is possible now that unused target config files are not created either. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-28-alex.bennee@linaro.org>
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Paolo Bonzini authored
Let write_target_makefile handle both host and container cross compilers. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-27-alex.bennee@linaro.org>
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Paolo Bonzini authored
It will not be specific to tests/tcg anymore, since it will be possible to build firmware using container-based cross compilers too. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-26-alex.bennee@linaro.org>
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Paolo Bonzini authored
Further decoupling of tests/tcg from the main QEMU Makefile, and making the build more similar between the cross compiler case and the vetted container images. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-25-alex.bennee@linaro.org>
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Paolo Bonzini authored
Almost all invocations of run-test have either "$* on $(TARGET_NAME)" or "$< on $(TARGET_NAME)" as the last argument. So provide a default test name, while allowing an escape hatch for custom names. As an additional simplification, remove the need to do shell quoting. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-24-alex.bennee@linaro.org>
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Paolo Bonzini authored
Make tests/tcg/ppc64le include tests/tcg/ppc64 instead of duplicating the rules. Because the ppc64le vpath includes tests/tcg/ppc64 but not vice versa, the tests have to be moved from tests/tcg/ppc64le/ to tests/tcg/ppc64. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-23-alex.bennee@linaro.org>
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Paolo Bonzini authored
Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-22-alex.bennee@linaro.org>
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Paolo Bonzini authored
Instead of linking tests/tcg/Makefile.target into the build tree, name the symbolic link "Makefile" and create it in every target subdirectory. This makes it possible to just invoke "make" in tests/tcg subdirectories. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-21-alex.bennee@linaro.org>
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Paolo Bonzini authored
Remove the DOCKER_SCRIPT and TARGET variable from the Makefile invocation for tests/tcg. For DOCKER_SCRIPT, resolve the path to docker.py in configure; for TARGET, move it to config-$(TARGET).mak and use a symbolic link to break the cycle. The symbolic link is still needed because tests/tcg includes dummy config files for targets that are not buildable. Once that is cleaned up, the symbolic link will go away too. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-20-alex.bennee@linaro.org>
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Paolo Bonzini authored
In preparation for removing $(DOCKER_SCRIPT) from the tests/tcg configuration files, have Make use the same container engine that had been probed at configure time. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-19-alex.bennee@linaro.org>
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Paolo Bonzini authored
For now, return 1 for container-based compilers. This will change as soon as ROMs will be buildable with them. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-18-alex.bennee@linaro.org>
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Paolo Bonzini authored
Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-17-alex.bennee@linaro.org>
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Paolo Bonzini authored
Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> [AJB: add clean dep to distclean] Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-16-alex.bennee@linaro.org>
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Paolo Bonzini authored
In preparation for adding Docker container support, detect compiler options just once rather than once per Make run; container startup overhead is substantial and doing the detection just once makes things faster. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-15-alex.bennee@linaro.org>
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Paolo Bonzini authored
In preparation for adding Docker container support, detect compiler options just once rather than once per Make run; container startup overhead is substantial and doing the detection just once makes things faster. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-14-alex.bennee@linaro.org>
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Alex Bennée authored
It seems the depth of stack we need to support can vary depending on the order of the init constructors getting called. It seems --enable-lto shuffles things around just enough to push you over the limit. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1186 Acked-by:
Thomas Huth <thuth@redhat.com> Acked-by:
Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20220929114231.583801-12-alex.bennee@linaro.org>
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Alex Bennée authored
Tracking alpine-edge like debian-sid is a moving target. Usually such rolling releases are marked as "allow_failure: true" in our CI. However as alpine presents a musl based distro and provides useful extra coverage lets track a release branch instead to avoid random breakages. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Thomas Huth <thuth@redhat.com> Message-Id: <20220929114231.583801-11-alex.bennee@linaro.org>
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Anton Johansson authored
Adds our build-time dependencies to containers which build qemu-hexagon, but aren't covered by libvirt-ci. Signed-off-by:
Anton Johansson <anjo@rev.ng> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220804115548.13024-11-anjo@rev.ng> Message-Id: <20220929114231.583801-9-alex.bennee@linaro.org>
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Anton Johansson authored
This patch updates the docker and cirrus files with the new packages by running tests/lcitool/refresh Signed-off-by:
Anton Johansson <anjo@rev.ng> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220804115548.13024-10-anjo@rev.ng> Message-Id: <20220929114231.583801-8-alex.bennee@linaro.org>
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Anton Johansson authored
Note, the glib2-native mapping exists separately from the normal glib2 mapping. The latter uses a `foreign` cross-policy-default, and libvirt-ci is not able to support package mappings for multiple cross-compilation policies. This will probably change in the future. Signed-off-by:
Alessandro Di Federico <ale@rev.ng> Signed-off-by:
Paolo Montesel <babush@rev.ng> Signed-off-by:
Anton Johansson <anjo@rev.ng> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220804115548.13024-9-anjo@rev.ng> Message-Id: <20220929114231.583801-7-alex.bennee@linaro.org>
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Alex Bennée authored
When tests/tcg gained it's own config-host.mak we forgot to move the GDB detection. Fixes: 544f4a25 (tests/tcg: isolate from QEMU's config-host.mak) Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-6-alex.bennee@linaro.org>
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Lucas Mateus Castro (alqotel) authored
The alpine docker image only comes with busybox, which doesn't have the '-e' option on its readlink, so change it to 'realpath' to avoid that problem. Suggested-by:
Daniel P. Berrangé <berrange@redhat.com> Signed-off-by:
Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20220922135516.33627-5-lucas.araujo@eldorado.org.br> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-5-alex.bennee@linaro.org>
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Lucas Mateus Castro (alqotel) authored
Changed build-environment.yml to only install spice-server on x86_64 and aarch64 as this package is only available on those architectures. Signed-off-by:
Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220922135516.33627-4-lucas.araujo@eldorado.org.br> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-4-alex.bennee@linaro.org>
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Lucas Mateus Castro (alqotel) authored
XEN hypervisor is only available in ARM and x86, but the yaml only checked if the architecture is different from s390x, changed it to a more accurate test. Tested this change on a Ubuntu 20.04 ppc64le. Signed-off-by:
Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220922135516.33627-3-lucas.araujo@eldorado.org.br> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-3-alex.bennee@linaro.org>
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Lucas Mateus Castro (alqotel) authored
ninja-build is missing from the RHEL environment, so a system prepared with that script would still fail to compile QEMU. Tested on a Fedora 36 Signed-off-by:
Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20220922135516.33627-2-lucas.araujo@eldorado.org.br> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220929114231.583801-2-alex.bennee@linaro.org>
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- Oct 05, 2022
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https://github.com/quic/qemuStefan Hajnoczi authored
Make store handling faster and more robust Bug fix in gen_tcg_funcs.py # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEENjXHiM5iuR/UxZq0ewJE+xLeRCIFAmM7JS4ACgkQewJE+xLe # RCJXxQf9ESfI6LVoB1VBsMs69WOHqhy1HUEVzM4Ku+CgDCNaFRRz7xFoy/sv4FOX # D7h5aYVuCLrX/KfttV6V+1GXX/XIyjMN81uZZ8/eiCvjt7D/9fkrUxp9E1Gh6KlV # Dci21OYjh4aStd4tXin0vPHN5wG+IuuYuSzj0Xvu8SzRjFYKsFkjfxPrVsm1zWvN # G1FfiUJ6AveRf9SJVuMTmLHY7jo9hg0/tpm7YpnxlIgzDVZbZDa1yDwaLEg/m6AT # GFHli/nOEsL1c6mbYmvVnGoSupjEj0+MfNIeOUrn8D5Gd66OgvU+FVVFBJQ4ZKi6 # ZuckxBjBE3d5XKyxCVryRA3at+WLYA== # =ron6 # -----END PGP SIGNATURE----- # gpg: Signature made Mon 03 Oct 2022 14:08:46 EDT # gpg: using RSA key 3635C788CE62B91FD4C59AB47B0244FB12DE4422 # gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 3635 C788 CE62 B91F D4C5 9AB4 7B02 44FB 12DE 4422 * tag 'pull-hex-20221003' of https://github.com/quic/qemu : Hexagon (gen_tcg_funcs.py): avoid duplicated tcg code on A_CVI_NEW Hexagon (target/hexagon) move store size tracking to translation Hexagon (target/hexagon) Change decision to set pkt_has_store_s[01] Hexagon (target/hexagon) add instruction attributes from archlib Signed-off-by:
Stefan Hajnoczi <stefanha@redhat.com>
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https://gitlab.com/rth7680/qemuStefan Hajnoczi authored
Cache CPUClass for use in hot code paths. Add CPUTLBEntryFull, probe_access_full, tlb_set_page_full. Add generic support for TARGET_TB_PCREL. tcg/ppc: Optimize 26-bit jumps using STQ for POWER 2.07 target/sh4: Fix TB_FLAG_UNALIGN # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmM8jXEdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/oEggArAHK8FtydfQ4ZwnF # SjXfpdP50OC0SZn3uBN93FZOrxz9UYG9t1oDHs39J/+b/u2nwJYch//EH2k+NtOW # hc3iIgS9bWgs/UWZESkViKQccw7gpYlc21Br38WWwFNEFyecX0p+e9pJgld5rSv1 # mRGvCs5J2svH2tcXl/Sb/JWgcumOJoG7qy2aLyJGolR6UOfwcfFMzQXzq8qjpRKH # Jh84qusE/rLbzBsdN6snJY4+dyvUo03lT5IJ4d+FQg2tUip+Qqt7pnMbsqq6qF6H # R6fWU1JTbsh7GxXJwQJ83jLBnUsi8cy6FKrZ3jyiBq76+DIpR0PqoEe+PN/weInU # TN0z4g== # =RfXJ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 04 Oct 2022 15:45:53 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20221004' of https://gitlab.com/rth7680/qemu : target/sh4: Fix TB_FLAG_UNALIGN tcg/ppc: Optimize 26-bit jumps accel/tcg: Introduce TARGET_TB_PCREL accel/tcg: Introduce tb_pc and log_pc hw/core: Add CPUClass.get_pc include/hw/core: Create struct CPUJumpCache accel/tcg: Inline tb_flush_jmp_cache accel/tcg: Do not align tb->page_addr[0] accel/tcg: Use DisasContextBase in plugin_gen_tb_start accel/tcg: Use bool for page_find_alloc accel/tcg: Remove PageDesc code_bitmap include/exec: Introduce TARGET_PAGE_ENTRY_EXTRA accel/tcg: Introduce tlb_set_page_full accel/tcg: Introduce probe_access_full accel/tcg: Suppress auto-invalidate in probe_access_internal accel/tcg: Drop addr member from SavedIOTLB accel/tcg: Rename CPUIOTLBEntry to CPUTLBEntryFull cputlb: used cached CPUClass in our hot-paths hw/core/cpu-sysemu: used cached class in cpu_asidx_from_attrs cpu: cache CPUClass in CPUState for hot code paths Signed-off-by:
Stefan Hajnoczi <stefanha@redhat.com>
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- Oct 04, 2022
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Richard Henderson authored
The value previously chosen overlaps GUSA_MASK. Rename all DELAY_SLOT_* and GUSA_* defines to emphasize that they are included in TB_FLAGs. Add aliases for the FPSCR and SR bits that are included in TB_FLAGS, so that we don't accidentally reassign those bits. Fixes: 4da06fb3 ("target/sh4: Implement prctl_unalign_sigbus") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/856 Reviewed-by:
Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Leandro Lupori authored
PowerPC64 processors handle direct branches better than indirect ones, resulting in less stalled cycles and branch misses. However, PPC's tb_target_set_jmp_target() was only using direct branches for 16-bit jumps, while PowerPC64's unconditional branch instructions are able to handle displacements of up to 26 bits. To take advantage of this, now jumps whose displacements fit in between 17 and 26 bits are also converted to direct branches. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Leandro Lupori <leandro.lupori@eldorado.org.br> [rth: Expanded some commentary.] Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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