It really indicates what is the number of allocated pages for one
packet.  Once there rename "used" to "pages_used".

Signed-off-by: Juan Quintela <quintela@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>

We send packages without pages sometimes for sysnchronizanion.  The
iov functions do the right thing, but we will be changing this code in
future patches.

Signed-off-by: Juan Quintela <quintela@redhat.com>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Signed-off-by: Juan Quintela <quintela@redhat.com>

target-arm queue:
 * Fix non-parallel expansion of CASP
 * nrf51_gpio: reflect pull-up/pull-down to IRQs
 * Fix crash if guest tries to enable non-existent PMU counters
 * Add PMUv2 to the Cortex-A15 and Cortex-A7
 * Make pmccntr_op_start/finish static

# gpg: Signature made Mon 25 Mar 2019 14:19:47 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20190325:
  target/arm: make pmccntr_op_start/finish static
  target/arm: cortex-a7 and cortex-a15 have pmus
  target/arm: fix crash on pmu register access
  target/arm: add PCI_TESTDEV back to default config
  nrf51_gpio: reflect pull-up/pull-down to IRQs
  target/arm: Fix non-parallel expansion of CASP

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

These functions are not used outside helper.c

Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190322162333.17159-4-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

cortex-a7 and cortex-a15 have pmus (PMUv2) and they advertise
them in ID_DFR0. Let's allow them to function. This also enables
the pmu cpu property to work with these cpu types, i.e. we can
now do '-cpu cortex-a15,pmu=off' to remove the pmu.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190322162333.17159-3-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Fix a QEMU NULL derefence that occurs when the guest attempts to
enable PMU counters with a non-v8 cpu model or a v8 cpu model
which has not configured a PMU.

Fixes: 4e7beb0c ("target/arm: Add a timer to predict PMU counter overflow")
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190322162333.17159-2-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

In the kconfig shuffle arm lost pci-testdev which is used by
kvm-unit-tests. Let's add it back.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20190322163059.9716-1-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Some drivers do I2C bitbanging by keeping the output to 0 and flipping
the GPIO direction between input and output (see for example in Linux
gpio_set_open_drain_value_commit, in drivers/gpio/gpiolib.c).
When the GPIO is set to input, the pull-up resistor brings the output
to 1, while when the GPIO is set to output, the output driver brings
the output to 0.

Implement this for the nRF51 GPIO device model.  First, if both input and
output are floating, and there is a pull-up or pull-down resistor
configured, do not just set s->in, but also make any devices listening
on the output qemu_irq receive that value.  Second, if the pin is
driven both internally (output pin) and externally you don't get a
short circuit if both sides drive the pin to the same value.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-id: 20190317141001.3346-1-pbonzini@redhat.com
[PMM: wrapped long line]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

The second word has been loaded from the unincremented
address since the first commit.

Fixes: 44ac14b0
Reported-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20190322234302.12770-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-and-fpu-fixes-250319-1' into staging

Mix of testing & fpu fixes

  - more splitting of Travis matric to avoid timeouts
  - Fused Multiply-Add fixes for MIPS and hardfloat
  - cleanups to docker travis emulation

# gpg: Signature made Mon 25 Mar 2019 10:44:44 GMT
# gpg:                using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44

* remotes/stsquad/tags/pull-testing-and-fpu-fixes-250319-1:
  docker: trivial changes to `make docker` help
  docker: Fix travis script unable to find source dir
  docker: Fix travis.py parser and misc change
  hardfloat: fix float32/64 fused multiply-add
  target/mips: Fix minor bug in FPU
  .travis.yml: reduce number of targets built while disabling things
  .travis.yml: --disable-user for --without-default-devices
  .travis.yml: split some more system builds
  configure: add --target-list-exclude

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Apply double quotes and period punctuation uniformly.

Signed-off-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Message-Id: <20190321212528.6100-1-wainersm@redhat.com>
Reviewed-by: Fam Zheng <fam@euphon.net>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

The script generated from QEMU_SRC/.travis.yml uses BUILD_DIR and
SRC_DIR path relative to the current dir, unless these variables
are exported in environment.

Since commit 05790daf BUILD_DIR is exported in the runner script,
although SRC_DIR is not, so that make docker-travis fails becase
the reference to source dir is wrong. So let's unset both BUILD_DIR
and SRC_DIR before calling the script, given it is executed from
the source dir already (as in Travis).

Signed-off-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Message-Id: <20190320221207.11366-3-wainersm@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Fixed the travis.py script that has failed to parse the current
QEMU_SRC/.travis.yml file. It no longer makes combinations from
env/matrix, instead it uses explicit includes. Also the compiler
can be omitted from matrix/include, so that Travis chooses the
first entry of the global compiler list.

Replaced yaml.load() with yaml.safe_load() so that quieting the
following deprecation warning:
https://github.com/yaml/pyyaml/wiki/PyYAML-yaml.load(input)-Deprecation



Signed-off-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Message-Id: <20190320221207.11366-2-wainersm@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Before falling back to softfloat FMA, we do not restore the original
values of inputs A and C. Fix it.

This bug was caught by running gcc's testsuite on RISC-V qemu.

Note that this change gives a small perf increase for fp-bench:

  Host: Intel(R) Core(TM) i7-4790K CPU @ 4.00GHz
  Command: perf stat -r 3 taskset -c 0 ./fp-bench -o mulAdd -p $prec

- $prec = single:
  - before:
    101.71 MFlops
    102.18 MFlops
    100.96 MFlops
  - after:
    103.63 MFlops
    103.05 MFlops
    102.96 MFlops

- $prec = double:
  - before:
    173.10 MFlops
    173.93 MFlops
    172.11 MFlops
  - after:
    178.49 MFlops
    178.88 MFlops
    178.66 MFlops

Signed-off-by: Kito Cheng <kito.cheng@gmail.com>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <20190322204320.17777-1-cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

Wrong type of NaN was generated for IEEE 754-2008 by MADDF.<D|S> and
MSUBF.<D|S> instructions when the arguments were (Inf, Zero, NaN) or
(Zero, Inf, NaN).

The if-else statement establishes if the system conforms to IEEE
754-1985 or IEEE 754-2008, and defines different behaviors depending
on that. In case of IEEE 754-2008, in mentioned cases of inputs,
<MADDF|MSUBF>.<D|S> returns the input value 'c' [2] (page 53) and
raises floating point exception 'Invalid Operation' [1] (pages 349,
350).

These scenarios were tested and the results in QEMU emulation match
the results obtained on the machine that has a MIPS64R6 CPU.

[1] MIPS Architecture for Programmers Volume II-a: The MIPS64
    Instruction Set Reference Manual, Revision 6.06
[2] MIPS Architecture for Programmers Volume IV-j: The MIPS64
    SIMD Architecture Module, Revision 1.12

Signed-off-by: Mateja Marjanovic <mateja.marjanovic@rt-rk.com>
Message-Id: <1553008916-15274-2-git-send-email-mateja.marjanovic@rt-rk.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[AJB: fixed up commit message]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

This build keeps timing out on Travis and it's unlikely including the
additional guest front-ends will catch any failures in the fallback
code.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com>

This is essentially a softmmu tweak so don't bother building
linux-user builds as well.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com>

We define a new class of targets (MAIN_SOFTMMU_TARGETS) to cover the
major architectures. We either just build those or use the new
target-list-exclude mechanism to remove them from the list. This will
hopefully stop some of the longer builds hitting the Travis timeout
limit.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com>

This is an inverse selection which excludes a selected set of targets
from the default target list. It will mostly be useful for CI
configurations but it might be useful for some users as well.

You cannot specify --target-list and --target-list-exclude at the same
time.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Tested-by: Wainer dos Santos Moschetta <wainersm@redhat.com>

slirp: clarify license of slirp as BSD-3

# gpg: Signature made Fri 22 Mar 2019 19:16:50 GMT
# gpg:                using RSA key DAE8E10975969CE5
# gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full]
# gpg:                 aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full]
# Primary key fingerprint: 87A9 BD93 3F87 C606 D276  F62D DAE8 E109 7596 9CE5

* remotes/elmarco/tags/slirp-pull-request:
  slirp: is not maintained by Kelly Price for a long time
  slirp: remove reference to COPYRIGHT file
  slirp: clarify license of slirp files using SPDX: implicit via unstated
  slirp: clarify license of slirp files using SPDX: implicit via COPYRIGHT
  slirp: clarify license of slirp files using SPDX: explicit MIT
  slirp: clarify license of slirp files using SPDX: explicit BSD
  slirp: relicense GPL files to BSD-3
  slirp: update COPYRIGHT to use full 3-Clause BSD License

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

slirp has been maintained by the QEMU maintainers and will be
maintained under an independent project soon.

Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Kelly Price <strredwolf@gmail.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>

The slirp COPYRIGHT file is a BSD-3 license. Instead of referring to
another project file, the SPDX license notice present in all source
files states that unequivocally.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>

Add SPDX license identifier to clarify the license of files without
explicit license header.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>

Add SPDX license identifier to clarify the license of files with
reference to BSD license from slirp COPYRIGHT file.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>

Add SPDX license identifier to clarify the license of files with
explicit MIT license header.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>

Add SPDX license identifier to clarify the license of files with
explicit 3-clause BSD license header.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>

In order to make slirp a standalone project, the project must have a
clear license, and be compatible with the GPL or LGPL.

Since commit 2f5f8996 ("Remove the
advertising clause from the slirp license"), slirp is BSD-3. But new
files have been added under slirp/ with QEMU GPL license since then.

The copyright holders have been asked to relicense files to BSD-3 and
gave their permission:

- slirp/dhcpv6.{c,h}

Subject: Re: Clearing slirp/ license
To: "Marc-André Lureau" <marcandre.lureau@gmail.com>, QEMU <qemu-devel@nongnu.org>, Thomas Huth <thuth@redhat.com>
Cc: Peter Maydell <peter.maydell@linaro.org>, Samuel Thibault <samuel.thibault@ens-lyon.org>
References: <CAJ+F1CKBRNdLPb_wOLhURdUJd-j1RHY2toKSTEhCBt_zs4Xk1w@mail.gmail.com>
From: "Cédric Le Goater" <clg@kaod.org>
Message-ID: <e942cdab-fe1b-fdf4-3b9f-da16a4afa953@kaod.org>
Date: Mon, 11 Mar 2019 16:23:25 +0100

> Could you reply that you have no objection in relicensing those files
> are 3-Clause BSD?

Fine for me. You can change the license of slirp/ncsi.c and
slirp/ncsi-pkt.hto a 3-Clause BSD.

Thanks,

C.

Subject: Re: [Qemu-devel] Clearing slirp/ license
To: Peter Maydell <peter.maydell@linaro.org>, Shan Gavin <shan.gavin@gmail.com>
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>, "Marc-André Lureau" <marcandre.lureau@gmail.com>, Gavin Shan <gwshan@linux.vnet.ibm.com>, Thomas Huth <thuth@redhat.com>, QEMU <qemu-devel@nongnu.org>, Samuel Thibault <samuel.thibault@ens-lyon.org>
References: <CAJ+F1CKBRNdLPb_wOLhURdUJd-j1RHY2toKSTEhCBt_zs4Xk1w@mail.gmail.com> <e942cdab-fe1b-fdf4-3b9f-da16a4afa953@kaod.org> <CAJ+F1C+hFfsa5gcSdttTP5J+uyDvNdYJWrm9OJM26+Zc1ZQkew@mail.gmail.com> <cc62e1fd-c564-e1b7-d10c-30665b481352@ozlabs.ru> <CAOL5TwkQXhPjdPP9v7n7mxAVxbDCSo6MEaG+E-Xys=MoD_pg2g@mail.gmail.com> <CAFEAcA_g=L2LSo=B_5dpJhJJrqFiOb6sswMVohQwpVGiKi_A7w@mail.gmail.com>
From: "Cédric Le Goater" <clg@kaod.org>
Message-ID: <4ddf6031-0df1-b3b5-965e-a181266e42b0@kaod.org>
Date: Tue, 12 Mar 2019 11:49:21 +0100

> Is the code in question copyright you personally, or copyright
> IBM as your employer at the time ? If the latter, it is IBM that
> would need to approve the relicensing.

That was done. I had our legal team approve the change of license.

Thanks,

C.

From: Shan Gavin <shan.gavin@gmail.com>
Date: Tue, 12 Mar 2019 15:04:54 +0800
Message-ID: <CAOL5TwkQXhPjdPP9v7n7mxAVxbDCSo6MEaG+E-Xys=MoD_pg2g@mail.gmail.com>
Subject: Re: [Qemu-devel] Clearing slirp/ license
To: Alexey Kardashevskiy <aik@ozlabs.ru>
Cc: "Marc-André Lureau" <marcandre.lureau@gmail.com>, "Cédric Le Goater" <clg@kaod.org>, gwshan@linux.vnet.ibm.com, Peter Maydell <peter.maydell@linaro.org>, Thomas Huth <thuth@redhat.com>, QEMU <qemu-devel@nongnu.org>, Samuel Thibault <samuel.thibault@ens-lyon.org>

> Gavin, could you reply that you have no objection in relicensing
> ncsi-pkt.h as 3-Clause BSD?

No objection. Please go ahead with the relicensing.

Cheers,
Gavin

- ncsi.c, ncsi-pkt.h

Subject: Re: Clearing slirp/ license
To: "Marc-André Lureau" <marcandre.lureau@gmail.com>, QEMU <qemu-devel@nongnu.org>, "Cédric Le Goater" <clg@kaod.org>
Cc: Peter Maydell <peter.maydell@linaro.org>, Samuel Thibault <samuel.thibault@ens-lyon.org>
References: <CAJ+F1CKBRNdLPb_wOLhURdUJd-j1RHY2toKSTEhCBt_zs4Xk1w@mail.gmail.com>
From: Thomas Huth <thuth@redhat.com>
Message-ID: <ed5a9f55-f2e5-298d-58ac-414759e9b491@redhat.com>
Date: Wed, 13 Feb 2019 12:30:32 +0100

> Could you reply that you have no objection in relicensing those files
> are 3-Clause BSD?

Ok, for the records: I'm fine if you change the license of dhcpv6.[ch]
to either 3-Clause BSD or 2-Clause BSD.

 Thomas

- vmstate.{c,h}

From: Juan Quintela <quintela@redhat.com>
To: "Marc-André Lureau" <marcandre.lureau@gmail.com>
Cc: QEMU <qemu-devel@nongnu.org>, Peter Maydell <peter.maydell@linaro.org>, Samuel Thibault <samuel.thibault@ens-lyon.org>
Subject: Re: Clearing slirp/ license
Date: Tue, 12 Mar 2019 12:43:17 +0100
Message-ID: <87k1h4qpwq.fsf@trasno.org>

> Juan, Could you reply that you have no objection in relicensing the
> vmstate files as 3-Clause BSD?

No problem at all on my side.

Later, Juan.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
[ for the NC-SI files ]
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Thomas Huth <thuth@redhat.com>

According to commit 2f5f8996 ("Remove
the advertising clause from the slirp license"), Danny Gasparovski
gave permission to license slirp code under 3-clause BSD license:

    Subject: RE: Slirp license
    Date: Thu, 8 Jan 2009 10:51:00 +1100
    From: "Gasparovski, Daniel" <Daniel.Gasparovski@ato.gov.au>
    To: "Richard Fontana" <rfontana@redhat.com>

    I have no objection to having Slirp code in QEMU be licensed under
    the 3-clause BSD license.

slirp/COPYRIGHT's initial version in 2004 (commit 5fafdf24) listed
only 3 clauses BUT used the poisonous advertising clause for clause 3
which is the controversial clause of non-free 4-clause (that is, it
appears that the BSD-4 license was copied, and then the WRONG clause
was deleted, when creating COPYRIGHT.  Perhaps explained as an easy
mistake to make since 3-clause was created by removing clause 3 of the
4-clause, where you sometimes see the three-clause version with
clauses 1, 2, 4; but more commonly see a renumbered version with
clauses 1, 2, 3 to close the gap. If you pay attention only to clause
numbers instead of content, it can be easy to confuse which clause to
delete to go from 4-clause to 3-clause).

Commit 2f5f8996 removed the poisonous wrong clause on
the grounds of moving from 4-clause to 3-clause; but did not add the
missing clause, which makes it LOOK like the 2-clause version.  But I
think we have a decent enough trail showing the intent for 3-clause.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>

x86 queue for -rc1

A few fixes that missed -rc0:
* CPU model documentation updates (Daniel P. Berrangé)
* Fix bogus OSPKE warnings (Eduardo Habkost)
* Work around KVM bugs when handing arch_capabilities
  (Eduardo Habkost)

# gpg: Signature made Thu 21 Mar 2019 19:32:02 GMT
# gpg:                using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/x86-next-pull-request:
  docs: add note about stibp CPU feature for spectre v2
  docs: clarify that spec-ctrl is only needed for Spectre v2
  i386: Disable OSPKE on CPU model definitions
  i386: Make arch_capabilities migratable
  i386: kvm: Disable arch_capabilities if MSR can't be set

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Fix object interface check macro usage

# gpg: Signature made Thu 21 Mar 2019 11:53:15 GMT
# gpg:                using RSA key BE86EBB415104FDF
# gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [full]
# gpg:                 aka "Daniel P. Berrange <berrange@redhat.com>" [full]
# Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E  8E3F BE86 EBB4 1510 4FDF

* remotes/berrange/tags/authz-next-pull-request:
  authz: Use OBJECT_CHECK() on objects

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Avoid struct packing warnings with gcc9

# gpg: Signature made Thu 21 Mar 2019 11:55:03 GMT
# gpg:                using RSA key BE86EBB415104FDF
# gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [full]
# gpg:                 aka "Daniel P. Berrange <berrange@redhat.com>" [full]
# Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E  8E3F BE86 EBB4 1510 4FDF

* remotes/berrange/tags/qcrypto-next-pull-request:
  crypto/block: remove redundant struct packing to fix build with gcc 9

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Build fails with gcc 9:

crypto/block-luks.c:689:18: error: taking address of packed member of ‘struct QCryptoBlockLUKSHeader’ may result in an unaligned pointer value [-Werror=address-of-packed-member]
  689 |     be32_to_cpus(&luks->header.payload_offset);
      |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
crypto/block-luks.c:690:18: error: taking address of packed member of ‘struct QCryptoBlockLUKSHeader’ may result in an unaligned pointer value [-Werror=address-of-packed-member]
  690 |     be32_to_cpus(&luks->header.key_bytes);
      |                  ^~~~~~~~~~~~~~~~~~~~~~~
crypto/block-luks.c:691:18: error: taking address of packed member of ‘struct QCryptoBlockLUKSHeader’ may result in an unaligned pointer value [-Werror=address-of-packed-member]
  691 |     be32_to_cpus(&luks->header.master_key_iterations);
      |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

... a bunch of similar errors...

crypto/block-luks.c:1288:22: error: taking address of packed member of ‘struct QCryptoBlockLUKSKeySlot’ may result in an unaligned pointer value [-Werror=address-of-packed-member]
 1288 |         be32_to_cpus(&luks->header.key_slots[i].stripes);
      |                      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors

All members of the QCryptoBlockLUKSKeySlot and QCryptoBlockLUKSHeader are
naturally aligned and we already check at build time there isn't any
unwanted padding. Drop the QEMU_PACKED attribute.

Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Greg Kurz <groug@kaod.org>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>

TYPE_QAUTHZ is an abstract object of type TYPE_OBJECT. All other
are children of TYPE_QAUTHZ, thus also objects.

Keep INTERFACE_CHECK() for interfaces, and use OBJECT_CHECK() on
objects.

Reported-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>

Merge I/O patch queue

Fix problem with end of file handling with websock channels

# gpg: Signature made Wed 20 Mar 2019 16:57:15 GMT
# gpg:                using RSA key BE86EBB415104FDF
# gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [full]
# gpg:                 aka "Daniel P. Berrange <berrange@redhat.com>" [full]
# Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E  8E3F BE86 EBB4 1510 4FDF

* remotes/berrange/tags/qio-next-pull-request:
  io: fix handling of EOF / error conditions in websock GSource

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

We were never reporting the G_IO_HUP event when an end of file was hit
on the websocket channel.

We also didn't report G_IO_ERR when we hit a fatal error processing the
websocket protocol.

The latter in particular meant that the chardev code would not notice
when an eof/error was encountered on the websocket channel, unless the
guest OS happened to trigger a write operation.

This meant that once the first client had quit, the chardev would never
listen to accept a new client.

Fixes launchpad bug 1816819
Acked-by: Stefano Garzarella <sgarzare@redhat.com>
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>

While the stibp CPU feature is not commonly used by guest OS for spectre
mitigation due to its performance impact, it is none the less best
practice to expose it to all guest OS. This allows the guest OS to
decide whether to make use or it.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20190307121838.6345-3-berrange@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

The docs currently say that the spec-ctrl feature is needed for both
Spectre variants, but it is only used to address Spectre v2. Also
remove the note about retpolines. The guest OS is usually treated
as a blackbox from host mgmt pov, so it won't have knowledge about
use of retpolines and thus should unconditionally expose spec-ctrl,
allowing the guest to decide whether to use it or not.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20190307121838.6345-2-berrange@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

Currently, the Cascadelake-Server, Icelake-Client, and
Icelake-Server are always generating the following warning:

  qemu-system-x86_64: warning: \
    host doesn't support requested feature: CPUID.07H:ECX [bit 4]

This happens because OSPKE was never returned by
GET_SUPPORTED_CPUID or x86_cpu_get_supported_feature_word().
OSPKE is a runtime flag automatically set by the KVM module or by
TCG code, was always cleared by x86_cpu_filter_features(), and
was not supposed to appear on the CPU model table.

Remove the OSPKE flag from the CPU model table entries, to avoid
the bogus warning and avoid returning invalid feature data on
query-cpu-* QMP commands.  As OSPKE was always cleared by
x86_cpu_filter_features(), this won't have any guest-visible
impact.

Include a test case that should detect the problem if we introduce
a similar bug again.

Fixes: c7a88b52 ("i386: Add new model of Cascadelake-Server")
Fixes: 8a11c62d ("i386: Add new CPU model Icelake-{Server,Client}")
Cc: Tao Xu <tao3.xu@intel.com>
Cc: Robert Hoo <robert.hu@linux.intel.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <20190319200515.14999-1-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

Now that kvm_arch_get_supported_cpuid() will only return
arch_capabilities if QEMU is able to initialize the MSR properly,
we know that the feature is safely migratable.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <20190125220606.4864-3-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>

KVM has two bugs in the handling of MSR_IA32_ARCH_CAPABILITIES:

1) Linux commit commit 1eaafe91a0df ("kvm: x86: IA32_ARCH_CAPABILITIES
   is always supported") makes GET_SUPPORTED_CPUID return
   arch_capabilities even if running on SVM.  This makes "-cpu
   host,migratable=off" incorrectly expose arch_capabilities on CPUID on
   AMD hosts (where the MSR is not emulated by KVM).

2) KVM_GET_MSR_INDEX_LIST does not return MSR_IA32_ARCH_CAPABILITIES if
   the MSR is not supported by the host CPU.  This makes QEMU not
   initialize the MSR properly at kvm_put_msrs() on those hosts.

Work around both bugs on the QEMU side, by checking if the MSR
was returned by KVM_GET_MSR_INDEX_LIST before returning the
feature flag on kvm_arch_get_supported_cpuid().

This has the unfortunate side effect of making arch_capabilities
unavailable on hosts without hardware support for the MSR until bug #2
is fixed on KVM, but I can't see another way to work around bug #1
without that side effect.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <20190125220606.4864-2-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>