- May 29, 2016
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Paolo Bonzini authored
Move the old qemu_ram_addr_from_host to memory_region_from_host and make it return an offset within the region. For qemu_ram_addr_from_host return the ram_addr_t directly, similar to what it was before commit 1b5ec234 ("memory: return MemoryRegion from qemu_ram_addr_from_host", 2013-07-04). Reviewed-by:
Marc-André Lureau <marcandre.lureau@gmail.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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- May 19, 2016
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Paolo Bonzini authored
exec-all.h contains TCG-specific definitions. It is not needed outside TCG-specific files such as translate.c, exec.c or *helper.c. One generic function had snuck into include/exec/exec-all.h; move it to include/qom/cpu.h. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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- May 13, 2016
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Sergey Fedorov authored
This field was used for telling cpu_interrupt() to unlink a chain of TBs being executed when it worked that way. Now, cpu_interrupt() don't do this anymore. So we don't need this field anymore. Signed-off-by:
Sergey Fedorov <serge.fdrv@gmail.com> Signed-off-by:
Sergey Fedorov <sergey.fedorov@linaro.org> Message-Id: <1462273462-14036-1-git-send-email-sergey.fedorov@linaro.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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- Mar 22, 2016
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Alex Bennée authored
To avoid cluttering the code with #ifdef legs we wrap up the print statements into a tlb_debug() macro. As access to the virtual TLB can get quite heavy defining DEBUG_TLB_LOG will ensure all the logs go to the qemu_log target of CPU_LOG_MMU instead of stderr. This remains compile time optional as these debug statements haven't been considered for usefulness for user visible logging. I've also removed DEBUG_TLB_CHECK which wasn't used. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Richard Henderson <rth@twiddle.net> Message-Id: <1458052224-9316-11-git-send-email-alex.bennee@linaro.org> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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- Mar 07, 2016
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Fam Zheng authored
All references to mr->ram_addr are replaced by memory_region_get_ram_addr(mr) (except for a few assertions that are replaced with mr->ram_block). Reviewed-by:
Gonglei <arei.gonglei@huawei.com> Signed-off-by:
Fam Zheng <famz@redhat.com> Message-Id: <1456813104-25902-5-git-send-email-famz@redhat.com> Acked-by:
Laszlo Ersek <lersek@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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- Jan 29, 2016
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Peter Maydell authored
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Message-id: 1453832250-766-4-git-send-email-peter.maydell@linaro.org
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- Jan 21, 2016
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Peter Maydell authored
Pass the MemTxAttrs for the memory access to iotlb_to_region(); this allows it to determine the correct AddressSpace to use for the lookup. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Acked-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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Peter Maydell authored
When looking up the MemoryRegionSection for the new TLB entry in tlb_set_page_with_attrs(), use cpu_asidx_from_attrs() to determine the correct address space index for the lookup, and pass it into address_space_translate_for_iotlb(). Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Acked-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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- Sep 16, 2015
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Peter Crosthwaite authored
Change tlb_set_dirty() to accept a CPU instead of an env pointer. This allows for removal of another CPUArchState usage from prototypes that need to be QOMified. Signed-off-by:
Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-Id: <d2b1dcbe7945112989861d8ba7369449c11cc273.1441614289.git.crosthwaite.peter@gmail.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Peter Crosthwaite authored
To prepare for multi-arch, cputlb.c should only have awareness of one single architecture. This means it should not have access to the full CPU lists which may be heterogeneous. Instead, push the CPU_LOOP() up to the one and only caller in exec.c. Signed-off-by:
Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-Id: <db06dc6c49f8970caaf116d0385f00ee10a56f2f.1441614289.git.crosthwaite.peter@gmail.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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- Sep 11, 2015
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Benjamin Herrenschmidt authored
This is set to true when the index is for an instruction fetch translation. The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS acessors. All targets ignore it for now, and all other callers pass "false". This will allow targets who wish to split the mmu index between instruction and data accesses to do so. A subsequent patch will do just that for PowerPC. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Message-Id: <1439796853-4410-2-git-send-email-benh@kernel.crashing.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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- Aug 25, 2015
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Peter Maydell authored
Guest CPU TLB maintenance operations may be sufficiently specialized to only need to flush TLB entries corresponding to a particular MMU index. Implement cputlb functions for this, to avoid the inefficiency of flushing TLB entries which we don't need to. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1439548879-1972-2-git-send-email-peter.maydell@linaro.org
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- Jun 05, 2015
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Stefan Hajnoczi authored
The cpu_physical_memory_reset_dirty() function is sometimes used together with cpu_physical_memory_get_dirty(). This is not atomic since two separate accesses to the dirty memory bitmap are made. Turn cpu_physical_memory_reset_dirty() and cpu_physical_memory_clear_dirty_range_type() into the atomic cpu_physical_memory_test_and_clear_dirty(). Signed-off-by:
Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <1417519399-3166-6-git-send-email-stefanha@redhat.com> Reviewed-by:
Fam Zheng <famz@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Paolo Bonzini authored
These days modification of the TLB is done in notdirty_mem_write, so the virtual address and env pointer as unnecessary. The new name of the function, tlb_unprotect_code, is consistent with tlb_protect_code. Reviewed-by:
Fam Zheng <famz@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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- Apr 26, 2015
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Peter Maydell authored
Add a MemTxAttrs field to the IOTLB, and allow target-specific code to set it via a new tlb_set_page_with_attrs() function; pass the attributes through to the device when making IO accesses. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Paolo Bonzini <pbonzini@redhat.com> Reviewed-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by:
Alex Bennée <alex.bennee@linaro.org>
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Peter Maydell authored
Make the CPU iotlb a structure rather than a plain hwaddr; this will allow us to add transaction attributes to it. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Paolo Bonzini <pbonzini@redhat.com> Reviewed-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by:
Alex Bennée <alex.bennee@linaro.org>
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- Feb 16, 2015
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Paolo Bonzini authored
Note that even after this patch, most callers of address_space_* functions must still be under the big QEMU lock, otherwise the memory region returned by address_space_translate can disappear as soon as address_space_translate returns. This will be fixed in the next part of this series. Reviewed-by:
Fam Zheng <famz@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Paolo Bonzini authored
After the previous patch, TLBs will be flushed on every change to the memory mapping. This patch augments that with synchronization of the MemoryRegionSections referred to in the iotlb array. With this change, it is guaranteed that iotlb_to_region will access the correct memory map, even once the TLB will be accessed outside the BQL. Reviewed-by:
Fam Zheng <famz@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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- Dec 16, 2014
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Antony Pavlov authored
Running barebox on qemu-system-mips* with '-d unimp' overloads stderr by very very many mips_cpu_handle_mmu_fault() messages: mips_cpu_handle_mmu_fault address=b80003fd ret 0 physical 00000000180003fd prot 3 mips_cpu_handle_mmu_fault address=a0800884 ret 0 physical 0000000000800884 prot 3 mips_cpu_handle_mmu_fault pc a080cd80 ad b80003fd rw 0 mmu_idx 0 So it's very difficult to find LOG_UNIMP message. The mips_cpu_handle_mmu_fault() messages appear on enabling ANY logging! It's not very handy. Adding separate log category for *_cpu_handle_mmu_fault() logging fixes the problem. Signed-off-by:
Antony Pavlov <antonynpavlov@gmail.com> Acked-by:
Alexander Graf <agraf@suse.de> Reviewed-by:
Richard Henderson <rth@twiddle.net> Message-id: 1418489298-1184-1-git-send-email-antonynpavlov@gmail.com Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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- Sep 01, 2014
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Xin Tong authored
QEMU system mode page table walks are expensive. Taken by running QEMU qemu-system-x86_64 system mode on Intel PIN , a TLB miss and walking a 4-level page tables in guest Linux OS takes ~450 X86 instructions on average. QEMU system mode TLB is implemented using a directly-mapped hashtable. This structure suffers from conflict misses. Increasing the associativity of the TLB may not be the solution to conflict misses as all the ways may have to be walked in serial. A victim TLB is a TLB used to hold translations evicted from the primary TLB upon replacement. The victim TLB lies between the main TLB and its refill path. Victim TLB is of greater associativity (fully associative in this patch). It takes longer to lookup the victim TLB, but its likely better than a full page table walk. The memory translation path is changed as follows : Before Victim TLB: 1. Inline TLB lookup 2. Exit code cache on TLB miss. 3. Check for unaligned, IO accesses 4. TLB refill. 5. Do the memory access. 6. Return to code cache. After Victim TLB: 1. Inline TLB lookup 2. Exit code cache on TLB miss. 3. Check for unaligned, IO accesses 4. Victim TLB lookup. 5. If victim TLB misses, TLB refill 6. Do the memory access. 7. Return to code cache The advantage is that victim TLB can offer more associativity to a directly mapped TLB and thus potentially fewer page table walks while still keeping the time taken to flush within reasonable limits. However, placing a victim TLB before the refill path increase TLB refill path as the victim TLB is consulted before the TLB refill. The performance results demonstrate that the pros outweigh the cons. some performance results taken on SPECINT2006 train datasets and kernel boot and qemu configure script on an Intel(R) Xeon(R) CPU E5620 @ 2.40GHz Linux machine are shown in the Google Doc link below. https://docs.google.com/spreadsheets/d/1eiItzekZwNQOal_h-5iJmC4tMDi051m9qidi5_nwvH4/edit?usp=sharing In summary, victim TLB improves the performance of qemu-system-x86_64 by 11% on average on SPECINT2006, kernelboot and qemu configscript and with highest improvement of in 26% in 456.hmmer. And victim TLB does not result in any performance degradation in any of the measured benchmarks. Furthermore, the implemented victim TLB is architecture independent and is expected to benefit other architectures in QEMU as well. Although there are measurement fluctuations, the performance improvement is very significant and by no means in the range of noises. Signed-off-by:
Xin Tong <trent.tong@gmail.com> Message-id: 1407202523-23553-1-git-send-email-trent.tong@gmail.com Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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- Jun 05, 2014
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Paolo Bonzini authored
This will collect all load and store helpers soon. For now it is just a replacement for softmmu_exec.h, which this patch stops including directly, but we also include it where this will be necessary in order to simplify the next patch. Reviewed-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Paolo Bonzini authored
It is only included in cputlb.c now. Reviewed-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Paolo Bonzini authored
They do not need to be in op_helper.c. Because cputlb.c now includes softmmu_template.h twice for each size, io_readX must be elided the second time through. Reviewed-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Stefan Weil authored
Commit 0f842f8a replaced GETPC_EXT() which was derived from GETPC() by GETRA_EXT() without fixing cputlb.c. A later patch replaced GETRA_EXT() by GETRA() in exec/softmmu_template.h which is included in cputlb.c. The TCG interpreter failed because the values returned by GETRA() were no longer explicitly set to 0. The redefinition of GETRA() introduced here fixes this. In addition, GETPC_ADJ which is also used in exec/softmmu_template.h is set to 0. Both changes reduce the compiled code size for cputlb.c by more than 100 bytes, so the normal TCG without interpreter also profits from the reduced code size and slightly faster code. Cc: qemu-stable@nongnu.org Reported-by:
Giovanni Mascellani <gio@debian.org> Signed-off-by:
Stefan Weil <sw@weilnetz.de> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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- Mar 13, 2014
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Andreas Färber authored
Signed-off-by:
Andreas Färber <afaerber@suse.de>
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Andreas Färber authored
Signed-off-by:
Andreas Färber <afaerber@suse.de>
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Andreas Färber authored
Signed-off-by:
Andreas Färber <afaerber@suse.de>
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Andreas Färber authored
Signed-off-by:
Andreas Färber <afaerber@suse.de>
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Andreas Färber authored
It no longer needs CPUArchState since moving watchpoints to CPUState. Signed-off-by:
Andreas Färber <afaerber@suse.de>
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Andreas Färber authored
Note that the argument is unused. Signed-off-by:
Andreas Färber <afaerber@suse.de>
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Andreas Färber authored
Signed-off-by:
Andreas Färber <afaerber@suse.de>
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Andreas Färber authored
Clear it on reset. Signed-off-by:
Andreas Färber <afaerber@suse.de>
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- Feb 11, 2014
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Edgar E. Iglesias authored
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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Edgar E. Iglesias authored
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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- Jan 13, 2014
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Juan Quintela authored
All the functions that use ram_addr_t should be here. Signed-off-by:
Juan Quintela <quintela@redhat.com> Reviewed-by:
Orit Wasserman <owasserm@redhat.com>
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Juan Quintela authored
We have an end parameter in all the callers, and this make it coherent with the rest of cpu_physical_memory_* functions, that also take a length parameter. Once here, move the start/end calculation to tlb_reset_dirty_range_all() as we don't need it here anymore. Signed-off-by:
Juan Quintela <quintela@redhat.com> Reviewed-by:
Eric Blake <eblake@redhat.com> Reviewed-by:
Orit Wasserman <owasserm@redhat.com>
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Juan Quintela authored
All uses except one really want the other meaning. Signed-off-by:
Juan Quintela <quintela@redhat.com> Reviewed-by:
Eric Blake <eblake@redhat.com> Reviewed-by:
Orit Wasserman <owasserm@redhat.com>
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Juan Quintela authored
Document it Signed-off-by:
Juan Quintela <quintela@redhat.com> Reviewed-by:
Eric Blake <eblake@redhat.com> Reviewed-by:
Orit Wasserman <owasserm@redhat.com>
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Juan Quintela authored
Signed-off-by:
Juan Quintela <quintela@redhat.com> Reviewed-by:
Orit Wasserman <owasserm@redhat.com> Reviewed-by:
Eric Blake <eblake@redhat.com>
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- Dec 23, 2013
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Richard Henderson authored
Don't duplicate the array length computation in the memset() when plain sizeof() can produce the correct results. Signed-off-by:
Richard Henderson <rth@twiddle.net> Reviewed-by:
Aurelien Jarno <aurelien@aurel32.net> Signed-off-by:
Andreas Färber <afaerber@suse.de>
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