- Oct 13, 2020
-
-
Daniel P. Berrangé authored
Signed-off-by:
Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20200918132903.1848939-4-berrange@redhat.com> Reviewed-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
-
Thomas Huth authored
I'm very often getting CC: on rather large patch series that modify the ACPI stuff of either ARM or x86, just because the bios-table-test is often slightly involved here. I can't say much about ACPI, and the bios-table-test is already covered by the ACPI section in MAINTAINERS, so I'd rather prefer to not getting automatically CC-ed on such patch series anymore. If people want my opinion about qtest-related changes, they can still put me on CC manually. Message-Id: <20201001042717.136033-1-thuth@redhat.com> Acked-by:
Laszlo Ersek <lersek@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
-
- Oct 12, 2020
-
-
Paolo Bonzini authored
Some objects accidentally inherit ObjectClass instead of Object. They compile silently but may crash after downcasting. In this patch, we introduce a coccinelle script to find broken declarations and fix them manually with proper base type. Signed-off-by:
Sergey Nizovtsev <snizovtsev@gmail.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
Paolo Bonzini authored
Over the years, most parts of exec.c that were not specific to softmmu have been moved to accel/tcg; what's left is mostly the low-level part of the memory API, which includes RAMBlock and AddressSpaceDispatch. However exec.c also hosts 4-500 lines of code for the target specific parts of the CPU QOM object, plus a few functions for user-mode emulation that do not have a better place (they are not TCG-specific so accel/tcg/user-exec.c is not a good place either). Move these parts to a new file, so that exec.c can be moved to softmmu/physmem.c. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
Paolo Bonzini authored
Keep most softmmu_ss files into the system-emulation-specific directory. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
Philippe Mathieu-Daudé authored
While the FW_CFG_DATA_GENERATOR_INTERFACE is only consumed by a device only available using system-mode (fw_cfg), it is implemented by a crypto component (tls-cipher-suites) which is always available when crypto is used. Commit 69699f30 introduced the following error in the qemu-storage-daemon binary: $ echo -e \ '{"execute": "qmp_capabilities"}\r\n{"execute": "qom-list-types"}\r\n{"execute": "quit"}\r\n' \ | storage-daemon/qemu-storage-daemon --chardev stdio,id=qmp0 --monitor qmp0 {"QMP": {"version": {"qemu": {"micro": 50, "minor": 1, "major": 5}, "package": ""}, "capabilities": ["oob"]}} {"return": {}} missing interface 'fw_cfg-data-generator' for object 'tls-creds' Aborted (core dumped) Since QOM dependencies are resolved at runtime, this issue could not be triggered at linktime, and we don't have test running the qemu-storage-daemon binary. Fix by always registering the QOM interface. Reported-by:
Kevin Wolf <kwolf@redhat.com> Fixes: 69699f30 ("crypto/tls-cipher-suites: Produce fw_cfg consumable blob") Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by:
Laszlo Ersek <lersek@redhat.com> Reviewed-by:
Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201006111909.2302081-2-philmd@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
- Oct 06, 2020
-
-
Pavel Dovgaluk authored
This is a test for GDB reverse debugging commands: reverse step and reverse continue. Every test in this suite consists of two phases: record and replay. Recording saves the execution of some instructions and makes an initial VM snapshot to allow reverse execution. Replay saves the order of the first instructions and then checks that they are executed backwards in the correct order. After that the execution is replayed to the end, and reverse continue command is checked by setting several breakpoints, and asserting that the execution is stopped at the last of them. Signed-off-by:
Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru> Reviewed-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by:
Willian Rampazzo <willianr@redhat.com> -- v5: - disabled (as some other tests) when running on gitlab due to the unidentified timeout problem Message-Id: <160174524678.12451.13258942849173670277.stgit@pasha-ThinkPad-X280> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
Pavel Dovgaluk authored
This patch adds replay.json file. It will be used for adding record/replay-related data structures and commands. Signed-off-by:
Pavel Dovgalyuk <pavel.dovgalyuk@ispras.ru> Reviewed-by:
Markus Armbruster <armbru@redhat.com> Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <160174519444.12451.3472949430004845434.stgit@pasha-ThinkPad-X280> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
- Oct 05, 2020
-
-
Claudio Fontana authored
register a "CpusAccel" interface for WHPX as well. Signed-off-by:
Claudio Fontana <cfontana@suse.de> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
Claudio Fontana authored
register a "CpusAccel" interface for qtest as well. Signed-off-by:
Claudio Fontana <cfontana@suse.de> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
Claudio Fontana authored
refactoring of cpus.c continues with cpu timer state extraction. cpu-timers: responsible for the softmmu cpu timers state, including cpu clocks and ticks. icount: counts the TCG instructions executed. As such it is specific to the TCG accelerator. Therefore, it is built only under CONFIG_TCG. One complication is due to qtest, which uses an icount field to warp time as part of qtest (qtest_clock_warp). In order to solve this problem, provide a separate counter for qtest. This requires fixing assumptions scattered in the code that qtest_enabled() implies icount_enabled(), checking each specific case. Signed-off-by:
Claudio Fontana <cfontana@suse.de> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> [remove redundant initialization with qemu_spice_init] Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> [fix lingering calls to icount_get] Signed-off-by:
Claudio Fontana <cfontana@suse.de> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
- Oct 01, 2020
-
-
John Snow authored
I am switching from github to gitlab. Signed-off-by:
John Snow <jsnow@redhat.com>
-
- Sep 30, 2020
-
-
Pavel Pisa authored
Updated MAINTAINERS for CAN bus related emulation as well. Signed-off-by:
Pavel Pisa <pisa@cmp.felk.cvut.cz> Message-Id: <6d1b8db69efc4e5cfad702d2150e1960e8f63572.1600069689.git.pisa@cmp.felk.cvut.cz> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
Philippe Mathieu-Daudé authored
Move hardware stubs unrelated from the accelerator to xen-hw-stub.c. Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200908155530.249806-5-philmd@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
Stefan Hajnoczi authored
The RCU code that Paolo maintains is missing a MAINTAINERS file entry. Signed-off-by:
Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20200909090851.14458-1-stefanha@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
- Sep 29, 2020
-
-
Peter Maydell authored
Convert qemu-ga-ref to rST format. This includes dropping the plain-text, pdf and info format outputs for this document; as with all our other Sphinx-based documentation, we provide HTML and manpage only. The qemu-ga-ref.rst is somewhat more stripped down than the .texi was, because we do not (currently) attempt to generate indexes for the commands, events and data types being documented. As the GA ref is now part of the Sphinx 'interop' manual, we can delete the direct link from index.html.in. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Message-Id: <20200925162316.21205-9-peter.maydell@linaro.org> Reviewed-by:
Markus Armbruster <armbru@redhat.com> [Unicode legacy literal dumbed down to plain string literal, TODO comment on displaying QEMU version added] Signed-off-by:
Markus Armbruster <armbru@redhat.com>
-
Peter Maydell authored
Some of our documentation is auto-generated from documentation comments in the JSON schema. For Sphinx, rather than creating a file to include, the most natural way to handle this is to have a small custom Sphinx extension which processes the JSON file and inserts documentation into the rST file being processed. This is the same approach that kerneldoc and hxtool use. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Message-Id: <20200925162316.21205-8-peter.maydell@linaro.org> Reviewed-by:
Markus Armbruster <armbru@redhat.com> [Comment and doc string formatting tweaked, unused method dropped, a few line breaks tweaked to follow PEP 8 more closely, MAINTAINERS section QAPI updated] Signed-off-by:
Markus Armbruster <armbru@redhat.com>
-
Philippe Mathieu-Daudé authored
Only qemu-system-FOO and qemu-storage-daemon provide QMP monitors, therefore such declarations and definitions are irrelevant for user-mode emulation. Extracting the PCI commands to their own schema reduces the size of the qapi-misc* headers generated, and pulls less QAPI-generated code into user-mode. Suggested-by:
Markus Armbruster <armbru@redhat.com> Acked-by:
Markus Armbruster <armbru@redhat.com> Acked-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200913195348.1064154-9-philmd@redhat.com> [Commit message tweaked] Signed-off-by:
Markus Armbruster <armbru@redhat.com>
-
Philippe Mathieu-Daudé authored
Only qemu-system-FOO and qemu-storage-daemon provide QMP monitors, therefore such declarations and definitions are irrelevant for user-mode emulation. Extracting the ACPI commands to their own schema reduces the size of the qapi-misc* headers generated, and pulls less QAPI-generated code into user-mode. Suggested-by:
Markus Armbruster <armbru@redhat.com> Acked-by:
Igor Mammedov <imammedo@redhat.com> Acked-by:
Markus Armbruster <armbru@redhat.com> Acked-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200913195348.1064154-8-philmd@redhat.com> [Commit message tweaked] Signed-off-by:
Markus Armbruster <armbru@redhat.com>
-
- Sep 23, 2020
-
-
Stefan Hajnoczi authored
Test aio_disable_external(), which switches from fdmon-epoll back to fdmon-poll. This resulted in an assertion failure that was fixed in the previous patch. Signed-off-by:
Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20200915120339.702938-3-stefanha@redhat.com>
-
Stefan Hajnoczi authored
Development of the userspace NVMe block driver picked up again recently. After talking with Fam I am stepping up as block/nvme.c maintainer. Patches will be merged through my 'block' tree. Cc: Kevin Wolf <kwolf@redhat.com> Cc: Klaus Jensen <k.jensen@samsung.com> Cc: Fam Zheng <fam@euphon.net> Signed-off-by:
Stefan Hajnoczi <stefanha@redhat.com> Acked-by:
Kevin Wolf <kwolf@redhat.com> Acked-by:
Klaus Jensen <k.jensen@samsung.com> Acked-by:
Fam Zheng <fam@euphon.net> Message-id: 20200907111632.90499-1-stefanha@redhat.com Signed-off-by:
Stefan Hajnoczi <stefanha@redhat.com>
-
- Sep 14, 2020
-
-
Havard Skinnemoen authored
This is a minimalistic boot ROM written specifically for use with QEMU. It supports loading the second-stage loader from SPI flash into RAM, SMP boot, and not much else. Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by:
Havard Skinnemoen <hskinnemoen@google.com> Message-id: 20200911052101.2602693-7-hskinnemoen@google.com Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
-
Havard Skinnemoen authored
Implement a device model for the System Global Control Registers in the NPCM730 and NPCM750 BMC SoCs. This is primarily used to enable SMP boot (the boot ROM spins reading the SCRPAD register) and DDR memory initialization; other registers are best effort for now. The reset values of the MDLR and PWRON registers are determined by the SoC variant (730 vs 750) and board straps respectively. Reviewed-by:
Joel Stanley <joel@jms.id.au> Reviewed-by:
Cédric Le Goater <clg@kaod.org> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by:
Alexander Bulekov <alxndr@bu.edu> Signed-off-by:
Havard Skinnemoen <hskinnemoen@google.com> Message-id: 20200911052101.2602693-2-hskinnemoen@google.com Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
-
- Sep 10, 2020
-
-
Alex Bennée authored
We have an exploding complexity problem in the testing so lets just move the more involved plugins into contrib. tests/plugins still exist for the basic plugins that exercise the API. We restore the old pre-meson style Makefile for contrib as it also doubles as a guide for out-of-tree plugin builds. While we are at it add some examples to the documentation and a specific plugins build target. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200909112742.25730-11-alex.bennee@linaro.org>
-
- Sep 09, 2020
-
-
Bin Meng authored
Microchip PolarFire SoC MMUART is ns16550 compatible, with some additional registers. Create a simple MMUART model built on top of the existing ns16550 model. Signed-off-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-6-git-send-email-bmeng.cn@gmail.com> Signed-off-by:
Alistair Francis <alistair.francis@wdc.com>
-
Bin Meng authored
This is an initial support for Microchip PolarFire SoC Icicle Kit. The Icicle Kit board integrates a PolarFire SoC, with one SiFive's E51 plus four U54 cores and many on-chip peripherals and an FPGA. For more details about Microchip PolarFire Soc, please see: https://www.microsemi.com/product-directory/soc-fpgas/5498-polarfire-soc-fpga Unlike SiFive FU540, the RISC-V core resect vector is at 0x20220000. The following perepherals are created as an unimplemented device: - Bus Error Uint 0/1/2/3/4 - L2 cache controller - SYSREG - MPUCFG - IOSCBCFG More devices will be added later. The BIOS image used by this machine is hss.bin, aka Hart Software Services, which can be built from: https://github.com/polarfire-soc/hart-software-services To launch this machine: $ qemu-system-riscv64 -nographic -M microchip-icicle-kit The memory is set to 1 GiB by default to match the hardware. A sanity check on ram size is performed in the machine init routine to prompt user to increase the RAM size to > 1 GiB when less than 1 GiB ram is detected. Signed-off-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-5-git-send-email-bmeng.cn@gmail.com> Signed-off-by:
Alistair Francis <alistair.francis@wdc.com>
-
- Sep 08, 2020
-
-
Eduardo Habkost authored
This started as a simple script that scanned for regular expressions, but became more and more complex when exceptions to the rules were found. I don't know if this should be maintained in the QEMU source tree long term (maybe it can be reused for other code transformations that Coccinelle can't handle). In either case, this is included as part of the patch series to document how exactly the automated code transformations in the next patches were done. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20200831210740.126168-7-ehabkost@redhat.com> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
-
- Sep 07, 2020
-
-
Thomas Huth authored
Now that we can use all our QEMU test containers in the gitlab-CI, we can easily add some jobs that test cross-compilation for various architectures. There is just only small ugliness: Since the shared runners on gitlab.com are single-threaded, we have to split each compilation job into two parts (--disable-user and --disable-system), and exclude some additional targets, to avoid that the jobs are running too long and hitting the timeout of 1 h. Message-Id: <20200823111757.72002-8-thuth@redhat.com> Reviewed-by:
Daniel P. Berrangé <berrange@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
-
- Sep 02, 2020
-
-
Keith Busch authored
The nvme emulated device development pace has increased recently. Klaus has offered to co-maintain, and since we have many new contributions coming through, we're adding a repository to accumulate and test new features. Cc: Klaus Jensen <its@irrelevant.dk> Acked-by:
Klaus Jensen <k.jensen@samsung.com> Acked-by:
Kevin Wolf <kwolf@redhat.com> Reviewed-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by:
Keith Busch <kbusch@kernel.org>
-
- Sep 01, 2020
-
-
Thomas Huth authored
The examples look nicer when using "::" code blocks. Also mention that "-d in_asm" only outputs instructions that have not been translated by the JIT layer yet. And while we're at it, also add the AVR doc file to the MAINTAINERS file. Signed-off-by:
Thomas Huth <huth@tuxfamily.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Michael Rolnik <mrolnik@gmail.com> Message-Id: <20200812155304.18016-1-huth@tuxfamily.org> Signed-off-by:
Laurent Vivier <laurent@vivier.eu>
-
- Aug 24, 2020
-
-
Edgar E. Iglesias authored
Document the Xilinx Versal Virt board. Signed-off-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200803164749.301971-2-edgar.iglesias@gmail.com Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
-
- Jul 27, 2020
-
-
Philippe Mathieu-Daudé authored
Add an entry to cover firmware.json (see commit 3a0adfc9: schema that describes the different uses and properties of virtual machine firmware). Cc: Laszlo Ersek <lersek@redhat.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Kashyap Chamarthy <kchamart@redhat.com> Cc: Daniel P. Berrange <berrange@redhat.com> Suggested-by:
Laszlo Ersek <lersek@redhat.com> Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200703183450.32398-1-philmd@redhat.com> Reviewed-by:
Daniel P. Berrangé <berrange@redhat.com> Reviewed-by:
Laszlo Ersek <lersek@redhat.com> Reviewed-by:
Kashyap Chamarthy <kchamart@redhat.com> Reviewed-by:
Michael S. Tsirkin <mst@redhat.com> Signed-off-by:
Michael S. Tsirkin <mst@redhat.com>
-
- Jul 21, 2020
-
-
Thomas Huth authored
The file docs/devel/fuzzing.txt should be in this section, too, and add myself as a reviewer (since I often take the fuzzer patches through the qtest-next tree, I should be notified on patches, too). Message-Id: <20200721053926.17197-1-thuth@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
-
- Jul 20, 2020
-
-
Peter Maydell authored
Document the arm 'virt' board, which has been undocumented for far too long given that it is the main recommended board type for arm guests. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Message-id: 20200713175746.5936-5-peter.maydell@linaro.org
-
Peter Maydell authored
Add skeletal documentation of the gumstix boards ('connex' and 'verdex'). Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Message-id: 20200713175746.5936-4-peter.maydell@linaro.org
-
Peter Maydell authored
Add skeletal documentation of the collie board. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Message-id: 20200713175746.5936-3-peter.maydell@linaro.org
-
Peter Maydell authored
Add skeletal documentation of the canon-a1100 board. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Message-id: 20200713175746.5936-2-peter.maydell@linaro.org
-
- Jul 17, 2020
-
-
Prasad J Pandit authored
Virtual VFAT driver is quite old and rarely used. Set its status to Odd Fixes. Signed-off-by:
Prasad J Pandit <pjp@fedoraproject.org> Message-Id: <20200710190451.761286-1-ppandit@redhat.com> Signed-off-by:
Kevin Wolf <kwolf@redhat.com>
-
- Jul 14, 2020
-
-
Aleksandar Markovic authored
Huacai Chen and Jiaxun Yang step in as new energy [1]. Aurelien Jarno comment [2]: It happens that I known Huacai Chen from the time he was upstreaming the Loongson 3 support to the kernel, I have been testing and reviewing his patches. I also know Jiaxun Yang from the #debian-mips IRC channel. I know that they are both very competent and have a good knowledge of the open source world. I therefore agree that they are good additions to maintain and/or review the MIPS part of QEMU. [1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg718434.html [2] https://www.mail-archive.com/qemu-devel@nongnu.org/msg718738.html Signed-off-by:
Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200701182559.28841-3-aleksandar.qemu.devel@gmail.com> PMD: [Split patch, added Aurelien's comment] Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by:
Jiaxun Yang <jiaxun.yang@flygoat.com> Acked-by:
Huacai Chen <chenhc@lemote.com>
-
Philippe Mathieu-Daudé authored
We forgot to include the qemu-block mailing list while adding this section in commit 076a0fc3. Fix this. Suggested-by:
Paolo Bonzini <pbonzini@redhat.com> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200630133912.9428-2-f4bug@amsat.org>
-