- Jun 12, 2015
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Aurelien Jarno authored
Splitting Q and M out of SR, it's possible to optimize div1 by using TCG code instead of an helper. At the same time removed the now unused gen_copy_bit_i32 function. Reviewed-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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Aurelien Jarno authored
Reviewed-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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Aurelien Jarno authored
Reviewed-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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Aurelien Jarno authored
Reviewed-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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Aurelien Jarno authored
In preparation for more efficient setting of this field. Reviewed-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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Aurelien Jarno authored
Use the bit number for SR constants instead of using a bit mask. This make possible to also use the constants for shifts. Reviewed-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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Aurelien Jarno authored
The documentation is clear to use 16-bit accesses for all registers. Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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Richard Henderson authored
Only exposing FPU and LLSC as the only features supported by the translator. Signed-off-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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- Jun 09, 2015
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Peter Maydell authored
Collected TCG patches # gpg: Signature made Tue Jun 9 15:06:18 2015 BST using RSA key ID 4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" * remotes/rth/tags/pull-tcg-20150609: tcg/optimize: rename tcg_constant_folding tcg/optimize: fold constant test in tcg_opt_gen_mov tcg/optimize: fold temp copies test in tcg_opt_gen_mov tcg/optimize: remove opc argument from tcg_opt_gen_mov tcg/optimize: remove opc argument from tcg_opt_gen_movi tcg: fix dead computation for repeated input arguments tcg: fix register allocation with two aliased dead inputs tcg: Handle MO_AMASK in tcg_dump_ops tcg: Mask TCGMemOp appropriately for indexing Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Aurelien Jarno authored
The tcg_constant_folding folding ends up doing all the optimizations (which is a good thing to avoid looping on all ops multiple time), so make it clear and just rename it tcg_optimize. Cc: Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net> Message-Id: <1433447607-31184-6-git-send-email-aurelien@aurel32.net> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Aurelien Jarno authored
Most of the calls to tcg_opt_gen_mov are preceeded by a test to check if the source temp is a constant. Fold that into the tcg_opt_gen_mov function. Cc: Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net> Message-Id: <1433495958-9508-1-git-send-email-aurelien@aurel32.net> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Aurelien Jarno authored
Each call to tcg_opt_gen_mov is preceeded by a test to check if the source and destination temps are copies. Fold that into the tcg_opt_gen_mov function. Cc: Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net> Message-Id: <1433447607-31184-4-git-send-email-aurelien@aurel32.net> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Aurelien Jarno authored
We can get the opcode using the TCGOp pointer. It needs to be dereferenced, but it's anyway done a few lines below to write the new value. Cc: Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net> Message-Id: <1433447607-31184-3-git-send-email-aurelien@aurel32.net> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Aurelien Jarno authored
We can get the opcode using the TCGOp pointer. It needs to be dereferenced, but it's anyway done a few lines below to write the new value. Cc: Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net> Message-Id: <1433447607-31184-2-git-send-email-aurelien@aurel32.net> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Aurelien Jarno authored
When the same temp is used twice or more as an input argument to a TCG instruction, the dead computation code doesn't recognize the second use as a dead temp. This is because the temp is marked as live in the same loop where dead inputs are checked. The fix is to split the loop in two parts. This avoid emitting a move and using a register for the movcond instruction when used as "move if true" on x86-64. This might bring more improvements on RISC TCG targets which don't have outputs aliased to inputs. Reviewed-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net> Message-Id: <1433447228-29425-3-git-send-email-aurelien@aurel32.net> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Aurelien Jarno authored
For TCG ops with two outputs registers (add2, sub2, div2, div2u), when the same input temp is used for the two inputs aliased to the two outputs, and when these inputs are both dead, the register allocation code wrongly assigned the same register to the same output. This happens for example with sub2 t1, t2, t3, t3, t4, t5, when t3 is not used anymore after the TCG op. In that case the same register is used for t1, t2 and t3. The fix is to look for already allocated aliased input when allocating a dead aliased input and check that the register is not already used. Cc: Richard Henderson <rth@twiddle.net> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net> Message-Id: <1433447228-29425-2-git-send-email-aurelien@aurel32.net> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
Reviewed-by:
Yongbok Kim <yongbok.kim@imgtec.com> Tested-by:
Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
The addition of MO_AMASK means that places that used inverted masks need to be changed to use positive masks, and places that failed to mask the intended bits need updating. Reviewed-by:
Yongbok Kim <yongbok.kim@imgtec.com> Tested-by:
Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Peter Maydell authored
s390x/virtio-ccw: migration and virtio for 2.4 1. Migration fixups 2. virtio 9pfs # gpg: Signature made Tue Jun 9 09:00:05 2015 BST using RSA key ID B5A61C7C # gpg: Good signature from "Christian Borntraeger (IBM) <borntraeger@de.ibm.com>" * remotes/borntraeger/tags/s390x-20150609: s390x/migration: add comment about floating point migration s390x/kvm: always ignore empty vcpu interrupt state virtio-ccw/migration: Migrate config vector for virtio devices virtio-ccw: add support for 9pfs Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Peter Maydell authored
Error reporting patches # gpg: Signature made Tue Jun 9 06:42:15 2015 BST using RSA key ID EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" * remotes/armbru/tags/pull-error-2015-06-09: vhost-user: Improve -netdev/netdev_add/-net/... error reporting QemuOpts: Convert qemu_opt_foreach() to Error QemuOpts: Drop qemu_opt_foreach() parameter abort_on_failure blkdebug: Simplify passing of Error through qemu_opts_foreach() QemuOpts: Convert qemu_opts_foreach() to Error QemuOpts: Drop qemu_opts_foreach() parameter abort_on_failure vl: Fail right after first bad -object vl: Print -device help at most once vl: Report failure to sandbox at most once Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Christian Borntraeger authored
commit 46c804de ("s390x: move fpu regs into a subsection of the vmstate") moved the fprs into a subsection and bumped the version number. This will allow to not transfer fprs in the future if necessary. Add a comment to mark the return true as intentional. CC: Juan Quintela <quintela@redhat.com> CC: David Hildenbrand <dahi@linux.vnet.ibm.com> Signed-off-by:
Christian Borntraeger <borntraeger@de.ibm.com> Message-Id: <1433758884-2997-1-git-send-email-borntraeger@de.ibm.com> Reviewed-by:
Juan Quintela <quintela@redhat.com>
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Markus Armbruster authored
When -netdev vhost-user fails, it first reports a specific error, then one or more generic ones, like this: $ qemu-system-x86_64 -netdev vhost-user,id=foo,chardev=xxx qemu-system-x86_64: -netdev vhost-user,id=foo,chardev=xxx: chardev "xxx" not found qemu-system-x86_64: -netdev vhost-user,id=foo,chardev=xxx: No suitable chardev found qemu-system-x86_64: -netdev vhost-user,id=foo,chardev=xxx: Device 'vhost-user' could not be initialized With the command line, the messages go to stderr. In HMP, they go to the monitor. In QMP, the last one becomes the error reply, and the others go to stderr. Convert net_init_vhost_user() and its helpers to Error. This suppresses the unwanted unspecific error messages, and makes the specific error the QMP error reply. Cc: Stefan Hajnoczi <stefanha@redhat.com> Cc: Jason Wang <jasowang@redhat.com> Signed-off-by:
Markus Armbruster <armbru@redhat.com> Reviewed-by:
Eric Blake <eblake@redhat.com> Reviewed-by:
Stefan Hajnoczi <stefanha@redhat.com>
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Markus Armbruster authored
Retain the function value for now, to permit selective conversion of its callers. Signed-off-by:
Markus Armbruster <armbru@redhat.com> Reviewed-by:
Eric Blake <eblake@redhat.com>
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Markus Armbruster authored
When the argument is non-zero, qemu_opt_foreach() stops on callback returning non-zero, and returns that value. When the argument is zero, it doesn't stop, and returns the callback's value from the last iteration. The two callers that pass zero could just as well pass one: * qemu_spice_init()'s callback add_channel() either returns zero or exit()s. * config_write_opts()'s callback config_write_opt() always returns zero. Drop the parameter, and always stop. Signed-off-by:
Markus Armbruster <armbru@redhat.com> Reviewed-by:
Eric Blake <eblake@redhat.com>
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Markus Armbruster authored
Cc: Kevin Wolf <kwolf@redhat.com> Cc: qemu-block@nongnu.org Signed-off-by:
Markus Armbruster <armbru@redhat.com> Reviewed-by:
Eric Blake <eblake@redhat.com> Acked-by:
Kevin Wolf <kwolf@redhat.com>
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Markus Armbruster authored
Retain the function value for now, to permit selective conversion of its callers. Signed-off-by:
Markus Armbruster <armbru@redhat.com> Reviewed-by:
Eric Blake <eblake@redhat.com> Acked-by:
Kevin Wolf <kwolf@redhat.com>
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- Jun 08, 2015
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Markus Armbruster authored
When the argument is non-zero, qemu_opts_foreach() stops on callback returning non-zero, and returns that value. When the argument is zero, it doesn't stop, and returns the bit-wise inclusive or of all the return values. Funky :) The callers that pass zero could just as well pass one, because their callbacks can't return anything but zero: * qemu_add_globals()'s callback qdev_add_one_global() * qemu_config_write()'s callback config_write_opts() * main()'s callbacks default_driver_check(), drive_enable_snapshot(), vnc_init_func() Drop the parameter, and always stop. Signed-off-by:
Markus Armbruster <armbru@redhat.com> Reviewed-by:
Eric Blake <eblake@redhat.com> Acked-by:
Kevin Wolf <kwolf@redhat.com>
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Markus Armbruster authored
Failure to create an object with -object is a fatal error. However, we delay the actual exit until all -object are processed. On the one hand, this permits detection of genuine additional errors. On the other hand, it can muddy the waters with uninteresting additional errors, e.g. when a later -object tries to reference a prior one that failed. We generally stop right on the first bad option, so do that for -object as well. Signed-off-by:
Markus Armbruster <armbru@redhat.com> Reviewed-by:
Eric Blake <eblake@redhat.com>
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Markus Armbruster authored
We print it once for each -device help. Not helpful. Stop after the first one. Signed-off-by:
Markus Armbruster <armbru@redhat.com> Reviewed-by:
Eric Blake <eblake@redhat.com>
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Markus Armbruster authored
It's reported once per -sandbox on. Stop on the first failure, like we do for other options. Not fixed: "-sandbox on -sandbox off" should leave the sandbox off. It doesn't. Signed-off-by:
Markus Armbruster <armbru@redhat.com> Reviewed-by:
Eric Blake <eblake@redhat.com>
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Peter Maydell authored
* KVM error improvement from Laurent * CONFIG_PARALLEL fix from Mirek * Atomic/optimized dirty bitmap access from myself and Stefan * BUILD_DIR convenience/bugfix from Peter C * Memory leak fix from Shannon * SMM improvements (though still TCG only) from myself and Gerd, acked by mst # gpg: Signature made Fri Jun 5 18:45:20 2015 BST using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (62 commits) update Linux headers from kvm/next atomics: add explicit compiler fence in __atomic memory barriers ich9: implement SMI_LOCK q35: implement TSEG q35: add test for SMRAM.D_LCK q35: implement SMRAM.D_LCK q35: add config space wmask for SMRAM and ESMRAMC q35: fix ESMRAMC default q35: implement high SMRAM hw/i386: remove smram_update target-i386: use memory API to implement SMRAM hw/i386: add a separate region that tracks the SMRAME bit target-i386: create a separate AddressSpace for each CPU vl: run "late" notifiers immediately qom: add object_property_add_const_link vl: allow full-blown QemuOpts syntax for -global pflash_cfi01: add secure property pflash_cfi01: change to new-style MMIO accessors pflash_cfi01: change big-endian property to BIT type target-i386: wake up processors that receive an SMI ... Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Peter Maydell authored
# gpg: Signature made Fri Jun 5 20:59:07 2015 BST using RSA key ID AAFC390E # gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: FAEB 9711 A12C F475 812F 18F2 88A9 064D 1835 61EB # Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76 CBD0 7DEF 8106 AAFC 390E * remotes/jnsnow/tags/ide-pull-request: macio: remove remainder_len DBDMA_io property macio: update comment/constants to reflect the new code macio: switch pmac_dma_write() over to new offset/len implementation macio: switch pmac_dma_read() over to new offset/len implementation fdc-test: Test state for existing cases more thoroughly fdc: Fix MSR.RQM flag fdc: Disentangle phases in fdctrl_read_data() fdc: Code cleanup in fdctrl_write_data() fdc: Use phase in fdctrl_write_data() fdc: Introduce fdctrl->phase fdc: Rename fdctrl_set_fifo() to fdctrl_to_result_phase() fdc: Rename fdctrl_reset_fifo() to fdctrl_to_command_phase() Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Alexander Graf authored
As of commit 076b35b5 (machine: add default_ram_size to machine class) we no longer have a global default ram size, but instead machine specific defaults. When invoking qemu --help we don't know which machine you selected, so we can't tell the user the default RAM size in the help text anymore now. Thus I don't see an easy way to expose the default ram size to the user in the help text. The easiest option IMHO is to just drop this piece of information. Reported-by:
Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by:
Alexander Graf <agraf@suse.de> Acked-by:
Laurent Desnogues <laurent.desnogues@gmail.com> Acked-by:
Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Message-id: 1433495103-62084-1-git-send-email-agraf@suse.de [PMM: rewrapped long commit message lines] Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Markus Armbruster authored
Commit 65207c59 accidentally dropped a line of code we need along with a comment that became wrong then. This made QMP reject "id": {"execute": "system_reset", "id": "1"} {"error": {"class": "GenericError", "desc": "QMP input object member 'id' is unexpected"}} Put the lost line right back, so QMP again accepts and returns "id", as promised by the ABI: {"execute": "system_reset", "id": "1"} {"return": {}, "id": "1"} Reported-by:
Fabio Fantoni <fabio.fantoni@m2r.biz> Signed-off-by:
Markus Armbruster <armbru@redhat.com> Signed-off-by:
Don Slutz <dslutz@verizon.com> Tested-by:
Fabio Fantoni <fabio.fantoni@m2r.biz> Signed-off-by:
Wen Congyang <wency@cn.fujitsu.com> Signed-off-by:
Pavel Fedin <p.fedin@samsung.com> Tested-by:
Eric Blake <eblake@redhat.com> Signed-off-by:
Markus Armbruster <armbru@redhat.com> Message-id: 1433753070-12632-2-git-send-email-armbru@redhat.com Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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- Jun 05, 2015
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Paolo Bonzini authored
This is kvm.git commit 05ff30bb56c6b3d3000519d6e02ed35678ddae3b. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Paolo Bonzini authored
__atomic_thread_fence does not include a compiler barrier; in the C++11 memory model, fences take effect in combination with other atomic operations. GCC implements this by making __atomic_load and __atomic_store access memory as if the pointer was volatile, and leaves no trace whatsoever of acquire and release fences in the compiler's intermediate representation. In QEMU, we want memory barriers to act on all memory, but at the same time we would like to use __atomic_thread_fence for portability reasons. Add compiler barriers manually around the __atomic_thread_fence. Message-Id: <1433334080-14912-1-git-send-email-pbonzini@redhat.com> Reviewed-by:
Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Gerd Hoffmann authored
Add write mask for the smi enable register, so we can disable write access to certain bits. Open all bits on reset. Disable write access to GBL_SMI_EN when SMI_LOCK (in ich9 lpc pci config space) is set. Write access to SMI_LOCK itself is disabled too. Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com> Acked-by:
Michael S. Tsirkin <mst@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Gerd Hoffmann authored
TSEG provides larger amounts of SMRAM than the 128 KB available with legacy SMRAM and high SMRAM. Route access to tseg into nowhere when enabled, for both cpus and busmaster dma, and add tseg window to smram region, so cpus can access it in smm mode. Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com> Acked-by:
Michael S. Tsirkin <mst@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Gerd Hoffmann authored
Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com> Acked-by:
Michael S. Tsirkin <mst@redhat.com> [Fix compilation of the newly introduced test. - Paolo] Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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