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  1. Jul 02, 2020
  2. Jul 01, 2020
  3. Jun 29, 2020
    • Philippe Mathieu-Daudé's avatar
      hw/misc/pca9552: Add missing TypeInfo::class_size field · fc1bff95
      Philippe Mathieu-Daudé authored
      
      When adding the generic PCA955xClass in commit 736132e4, we
      forgot to set the class_size field. Fill it now to avoid:
      
        (gdb) run -machine mcimx6ul-evk -m 128M -display none -serial stdio -kernel ./OS.elf
        Starting program: ../../qemu/qemu/arm-softmmu/qemu-system-arm -machine mcimx6ul-evk -m 128M -display none -serial stdio -kernel ./OS.elf
        double free or corruption (!prev)
        Thread 1 "qemu-system-arm" received signal SIGABRT, Aborted.
        __GI_raise (sig=sig@entry=6) at ../sysdeps/unix/sysv/linux/raise.c:50
        (gdb) where
        #0  __GI_raise (sig=sig@entry=6) at ../sysdeps/unix/sysv/linux/raise.c:50
        #1  0x00007ffff75d8859 in __GI_abort () at abort.c:79
        #2  0x00007ffff76433ee in __libc_message
            (action=action@entry=do_abort, fmt=fmt@entry=0x7ffff776d285 "%s\n")
            at ../sysdeps/posix/libc_fatal.c:155
        #3  0x00007ffff764b47c in malloc_printerr
            (str=str@entry=0x7ffff776f690 "double free or corruption (!prev)")
            at malloc.c:5347
        #4  0x00007ffff764d12c in _int_free
            (av=0x7ffff779eb80 <main_arena>, p=0x5555567a3990, have_lock=<optimized out>) at malloc.c:4317
        #5  0x0000555555c906c3 in type_initialize_interface
            (ti=ti@entry=0x5555565b8f40, interface_type=0x555556597ad0, parent_type=0x55555662ca10) at qom/object.c:259
        #6  0x0000555555c902da in type_initialize (ti=ti@entry=0x5555565b8f40)
            at qom/object.c:323
        #7  0x0000555555c90d20 in type_initialize (ti=0x5555565b8f40)
            at qom/object.c:1028
      
        $ valgrind --track-origins=yes qemu-system-arm -M mcimx6ul-evk -m 128M -display none -serial stdio -kernel ./OS.elf
        ==77479== Memcheck, a memory error detector
        ==77479== Copyright (C) 2002-2017, and GNU GPL'd, by Julian Seward et al.
        ==77479== Using Valgrind-3.15.0 and LibVEX; rerun with -h for copyright info
        ==77479== Command: qemu-system-arm -M mcimx6ul-evk -m 128M -display none -serial stdio -kernel ./OS.elf
        ==77479==
        ==77479== Invalid write of size 2
        ==77479==    at 0x6D8322: pca9552_class_init (pca9552.c:424)
        ==77479==    by 0x844D1F: type_initialize (object.c:1029)
        ==77479==    by 0x844D1F: object_class_foreach_tramp (object.c:1016)
        ==77479==    by 0x4AE1057: g_hash_table_foreach (in /usr/lib/x86_64-linux-gnu/libglib-2.0.so.0.6400.2)
        ==77479==    by 0x8453A4: object_class_foreach (object.c:1038)
        ==77479==    by 0x8453A4: object_class_get_list (object.c:1095)
        ==77479==    by 0x556194: select_machine (vl.c:2416)
        ==77479==    by 0x556194: qemu_init (vl.c:3828)
        ==77479==    by 0x40AF9C: main (main.c:48)
        ==77479==  Address 0x583f108 is 0 bytes after a block of size 200 alloc'd
        ==77479==    at 0x483DD99: calloc (in /usr/lib/x86_64-linux-gnu/valgrind/vgpreload_memcheck-amd64-linux.so)
        ==77479==    by 0x4AF8D30: g_malloc0 (in /usr/lib/x86_64-linux-gnu/libglib-2.0.so.0.6400.2)
        ==77479==    by 0x844258: type_initialize.part.0 (object.c:306)
        ==77479==    by 0x844D1F: type_initialize (object.c:1029)
        ==77479==    by 0x844D1F: object_class_foreach_tramp (object.c:1016)
        ==77479==    by 0x4AE1057: g_hash_table_foreach (in /usr/lib/x86_64-linux-gnu/libglib-2.0.so.0.6400.2)
        ==77479==    by 0x8453A4: object_class_foreach (object.c:1038)
        ==77479==    by 0x8453A4: object_class_get_list (object.c:1095)
        ==77479==    by 0x556194: select_machine (vl.c:2416)
        ==77479==    by 0x556194: qemu_init (vl.c:3828)
        ==77479==    by 0x40AF9C: main (main.c:48)
      
      Fixes: 736132e4 ("hw/misc/pca9552: Add generic PCA955xClass")
      Reported-by: default avatarJean-Christophe DUBOIS <jcd@tribudubois.net>
      Signed-off-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
      Tested-by: default avatarJean-Christophe DUBOIS <jcd@tribudubois.net>
      Message-id: 20200629074704.23028-1-f4bug@amsat.org
      Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      fc1bff95
  4. Jun 27, 2020
  5. Jun 26, 2020
    • Peter Maydell's avatar
      Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200626' into staging · 553cf5d7
      Peter Maydell authored
      
      target-arm queue:
       * hw/arm/aspeed: improve QOM usage
       * hw/misc/pca9552: trace GPIO change events
       * target/arm: Implement ARMv8.5-MemTag for system emulation
      
      # gpg: Signature made Fri 26 Jun 2020 16:13:27 BST
      # gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
      # gpg:                issuer "peter.maydell@linaro.org"
      # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
      # gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
      # gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
      # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE
      
      * remotes/pmaydell/tags/pull-target-arm-20200626: (57 commits)
        target/arm: Enable MTE
        target/arm: Add allocation tag storage for system mode
        target/arm: Create tagged ram when MTE is enabled
        target/arm: Cache the Tagged bit for a page in MemTxAttrs
        target/arm: Always pass cacheattr to get_phys_addr
        target/arm: Set PSTATE.TCO on exception entry
        target/arm: Implement data cache set allocation tags
        target/arm: Complete TBI clearing for user-only for SVE
        target/arm: Add mte helpers for sve scatter/gather memory ops
        target/arm: Handle TBI for sve scalar + int memory ops
        target/arm: Add mte helpers for sve scalar + int ff/nf loads
        target/arm: Add mte helpers for sve scalar + int stores
        target/arm: Add mte helpers for sve scalar + int loads
        target/arm: Add arm_tlb_bti_gp
        target/arm: Tidy trans_LD1R_zpri
        target/arm: Use mte_check1 for sve LD1R
        target/arm: Use mte_checkN for sve unpredicated stores
        target/arm: Use mte_checkN for sve unpredicated loads
        target/arm: Add helper_mte_check_zva
        target/arm: Implement helper_mte_checkN
        ...
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      553cf5d7
    • Peter Maydell's avatar
      Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging · 3591ddd3
      Peter Maydell authored
      
      * Various fixes
      * libdaxctl support to correctly align devdax character devices (Jingqi)
      * initial-all-set support for live migration (Jay)
      * forbid '-numa node, mem' for 5.1 and newer machine types (Igor)
      * x87 fixes (Joseph)
      * Tighten memory_region_access_valid (Michael) and fix fallout (myself)
      * Replay fixes (Pavel)
      
      # gpg: Signature made Fri 26 Jun 2020 14:42:17 BST
      # gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
      # gpg:                issuer "pbonzini@redhat.com"
      # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
      # gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
      # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
      #      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83
      
      * remotes/bonzini/tags/for-upstream: (31 commits)
        i386: Mask SVM features if nested SVM is disabled
        ibex_uart: fix XOR-as-pow
        vmport: move compat properties to hw_compat_5_0
        hyperv: vmbus: Remove the 2nd IRQ
        kvm: i386: allow TSC to differ by NTP correction bounds without TSC scaling
        numa: forbid '-numa node, mem' for 5.1 and newer machine types
        osdep: Make MIN/MAX evaluate arguments only once
        target/i386: Add notes for versioned CPU models
        target/i386: reimplement fpatan using floatx80 operations
        target/i386: reimplement fyl2x using floatx80 operations
        target/i386: reimplement fyl2xp1 using floatx80 operations
        target/i386: reimplement fprem, fprem1 using floatx80 operations
        softfloat: return low bits of quotient from floatx80_modrem
        softfloat: do not set denominator high bit for floatx80 remainder
        softfloat: do not return pseudo-denormal from floatx80 remainder
        softfloat: fix floatx80 remainder pseudo-denormal check for zero
        softfloat: merge floatx80_mod and floatx80_rem
        target/i386: reimplement f2xm1 using floatx80 operations
        xen: Actually fix build without passthrough
        Makefile: Install qemu-[qmp/ga]-ref.* into the directory "interop"
        ...
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      3591ddd3
    • Eduardo Habkost's avatar
      i386: Mask SVM features if nested SVM is disabled · 730319ae
      Eduardo Habkost authored
      
      QEMU incorrectly validates FEAT_SVM feature flags against
      GET_SUPPORTED_CPUID even if SVM features are being masked out by
      cpu_x86_cpuid().  This can make QEMU print warnings on most AMD
      CPU models, even when SVM nesting is disabled (which is the
      default).
      
      This bug was never detected before because of a Linux KVM bug:
      until Linux v5.6, KVM was not filtering out SVM features in
      GET_SUPPORTED_CPUID when nested was disabled.  This KVM bug was
      fixed in Linux v5.7-rc1, on Linux commit a50718cc3f43 ("KVM:
      nSVM: Expose SVM features to L1 iff nested is enabled").
      
      Fix the problem by adding a CPUID_EXT3_SVM dependency to all
      FEAT_SVM feature flags in the feature_dependencies table.
      
      Reported-by: default avatarYanan Fu <yfu@redhat.com>
      Signed-off-by: default avatarEduardo Habkost <ehabkost@redhat.com>
      Message-Id: <20200623230116.277409-1-ehabkost@redhat.com>
      [Fix testcase. - Paolo]
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      730319ae
    • Paolo Bonzini's avatar
      ibex_uart: fix XOR-as-pow · c8d7fd05
      Paolo Bonzini authored
      
      The xor-as-pow warning in clang actually detected a genuine bug.
      Fix it.
      
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      c8d7fd05
    • Paolo Bonzini's avatar
      vmport: move compat properties to hw_compat_5_0 · f983ff95
      Paolo Bonzini authored
      
      The patches that introduced the properties were submitted when QEMU 5.0
      had not been released yet, so they got merged under the wrong heading.
      Move them to hw_compat_5_0 so that 5.0 machine types get the pre-patch
      behavior.
      
      Fixes: b8892129 ("hw/i386/vmport: Propagate IOPort read to vCPU EAX register")
      Fixes: 0342ee76 ("hw/i386/vmport: Set EAX to -1 on failed and unsupported commands")
      Fixes: f8bdc550 ("hw/i386/vmport: Report vmware-vmx-type in CMD_GETVERSION")
      Fixes: aaacf1c1 ("hw/i386/vmport: Add support for CMD_GETBIOSUUID")
      Reported-by: default avatarLaurent Vivier <lvivier@redhat.com>
      Cc: Liran Alon <liran.alon@oracle.com>
      Reviewed-by: default avatarLaurent Vivier <lvivier@redhat.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      f983ff95
    • Jon Doron's avatar
      hyperv: vmbus: Remove the 2nd IRQ · 8f06f22f
      Jon Doron authored
      
      It seems like Windows does not really require 2 IRQs to have a
      functioning VMBus.
      
      Signed-off-by: default avatarJon Doron <arilou@gmail.com>
      Message-Id: <20200617160904.681845-2-arilou@gmail.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      8f06f22f
    • Marcelo Tosatti's avatar
      kvm: i386: allow TSC to differ by NTP correction bounds without TSC scaling · 74aaddc6
      Marcelo Tosatti authored
      
      The Linux TSC calibration procedure is subject to small variations
      (its common to see +-1 kHz difference between reboots on a given CPU, for example).
      
      So migrating a guest between two hosts with identical processor can fail, in case
      of a small variation in calibrated TSC between them.
      
      Allow a conservative 250ppm error between host TSC and VM TSC frequencies,
      rather than requiring an exact match. NTP daemon in the guest can
      correct this difference.
      
      Also change migration to accept this bound.
      
      KVM_SET_TSC_KHZ depends on a kernel interface change. Without this change,
      the behaviour remains the same: in case of a different frequency
      between host and VM, KVM_SET_TSC_KHZ will fail and QEMU will exit.
      
      Signed-off-by: default avatarMarcelo Tosatti <mtosatti@redhat.com>
      
      Message-Id: <20200616165805.GA324612@fuller.cnet>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      74aaddc6
    • Igor Mammedov's avatar
      numa: forbid '-numa node, mem' for 5.1 and newer machine types · 32a354dc
      Igor Mammedov authored
      
      Deprecation period is run out and it's a time to flip the switch
      introduced by cd5ff833.  Disable legacy option for new machine
      types (since 5.1) and amend documentation.
      
      '-numa node,memdev' shall be used instead of disabled option
      with new machine types.
      
      Signed-off-by: default avatarIgor Mammedov <imammedo@redhat.com>
      Reviewed-by: default avatarMichal Privoznik <mprivozn@redhat.com>
      Reviewed-by: default avatarMichael S. Tsirkin <mst@redhat.com>
      Reviewed-by: default avatarGreg Kurz <groug@kaod.org>
      Message-Id: <20200609135635.761587-1-imammedo@redhat.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      32a354dc
    • Eric Blake's avatar
      osdep: Make MIN/MAX evaluate arguments only once · f9919116
      Eric Blake authored
      I'm not aware of any immediate bugs in qemu where a second runtime
      evaluation of the arguments to MIN() or MAX() causes a problem, but
      proactively preventing such abuse is easier than falling prey to an
      unintended case down the road.  At any rate, here's the conversation
      that sparked the current patch:
      https://lists.gnu.org/archive/html/qemu-devel/2018-12/msg05718.html
      
      
      
      Update the MIN/MAX macros to only evaluate their argument once at
      runtime; this uses typeof(1 ? (a) : (b)) to ensure that we are
      promoting the temporaries to the same type as the final comparison (we
      have to trigger type promotion, as typeof(bitfield) won't compile; and
      we can't use typeof((a) + (b)) or even typeof((a) + 0), as some of our
      uses of MAX are on void* pointers where such addition is undefined).
      
      However, we are unable to work around gcc refusing to compile ({}) in
      a constant context (such as the array length of a static variable),
      even when only used in the dead branch of a __builtin_choose_expr(),
      so we have to provide a second macro pair MIN_CONST and MAX_CONST for
      use when both arguments are known to be compile-time constants and
      where the result must also be usable as a constant; this second form
      evaluates arguments multiple times but that doesn't matter for
      constants.  By using a void expression as the expansion if a
      non-constant is presented to this second form, we can enlist the
      compiler to ensure the double evaluation is not attempted on
      non-constants.
      
      Alas, as both macros now rely on compiler intrinsics, they are no
      longer usable in preprocessor #if conditions; those will just have to
      be open-coded or the logic rewritten into #define or runtime 'if'
      conditions (but where the compiler dead-code-elimination will probably
      still apply).
      
      I tested that both gcc 10.1.1 and clang 10.0.0 produce errors for all
      forms of macro mis-use.  As the errors can sometimes be cryptic, I'm
      demonstrating the gcc output:
      
      Use of MIN when MIN_CONST is needed:
      
      In file included from /home/eblake/qemu/qemu-img.c:25:
      /home/eblake/qemu/include/qemu/osdep.h:249:5: error: braced-group within expression allowed only inside a function
        249 |     ({                                                  \
            |     ^
      /home/eblake/qemu/qemu-img.c:92:12: note: in expansion of macro ‘MIN’
         92 | char array[MIN(1, 2)] = "";
            |            ^~~
      
      Use of MIN_CONST when MIN is needed:
      
      /home/eblake/qemu/qemu-img.c: In function ‘is_allocated_sectors’:
      /home/eblake/qemu/qemu-img.c:1225:15: error: void value not ignored as it ought to be
       1225 |             i = MIN_CONST(i, n);
            |               ^
      
      Use of MIN in the preprocessor:
      
      In file included from /home/eblake/qemu/accel/tcg/translate-all.c:20:
      /home/eblake/qemu/accel/tcg/translate-all.c: In function ‘page_check_range’:
      /home/eblake/qemu/include/qemu/osdep.h:249:6: error: token "{" is not valid in preprocessor expressions
        249 |     ({                                                  \
            |      ^
      
      Fix the resulting callsites that used #if or computed a compile-time
      constant min or max to use the new macros.  cpu-defs.h is interesting,
      as CPU_TLB_DYN_MAX_BITS is sometimes used as a constant and sometimes
      dynamic.
      
      It may be worth improving glib's MIN/MAX definitions to be saner, but
      that is a task for another day.
      
      Signed-off-by: default avatarEric Blake <eblake@redhat.com>
      Reviewed-by: default avatarPhilippe Mathieu-Daudé <philmd@redhat.com>
      Tested-by: default avatarPhilippe Mathieu-Daudé <philmd@redhat.com>
      Message-Id: <20200625162602.700741-1-eblake@redhat.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      f9919116
    • Tao Xu's avatar
      target/i386: Add notes for versioned CPU models · 47f0d11d
      Tao Xu authored
      
      Add which features are added or removed in this version.
      
      Signed-off-by: default avatarTao Xu <tao3.xu@intel.com>
      Message-Id: <20200324051034.30541-1-tao3.xu@intel.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      47f0d11d
    • Joseph Myers's avatar
      target/i386: reimplement fpatan using floatx80 operations · ff57bb7b
      Joseph Myers authored
      
      The x87 fpatan emulation is currently based around conversion to
      double.  This is inherently unsuitable for a good emulation of any
      floatx80 operation.  Reimplement using the soft-float operations, as
      for other such instructions.
      
      Signed-off-by: default avatarJoseph Myers <joseph@codesourcery.com>
      
      Message-Id: <alpine.DEB.2.21.2006230000340.24721@digraph.polyomino.org.uk>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      ff57bb7b
    • Joseph Myers's avatar
      target/i386: reimplement fyl2x using floatx80 operations · 1f18a1e6
      Joseph Myers authored
      
      The x87 fyl2x emulation is currently based around conversion to
      double.  This is inherently unsuitable for a good emulation of any
      floatx80 operation.  Reimplement using the soft-float operations,
      building on top of the reimplementation of fyl2xp1 and factoring out
      code to be shared between the two instructions.
      
      The included test assumes that the result in round-to-nearest mode
      should always be one of the two closest floating-point numbers to the
      mathematically exact result (including that it should be exact, in the
      exact cases which cover more cases than for fyl2xp1).
      
      Signed-off-by: default avatarJoseph Myers <joseph@codesourcery.com>
      Message-Id: <alpine.DEB.2.21.2006172321530.20587@digraph.polyomino.org.uk>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      1f18a1e6
    • Joseph Myers's avatar
      target/i386: reimplement fyl2xp1 using floatx80 operations · 5eebc49d
      Joseph Myers authored
      
      The x87 fyl2xp1 emulation is currently based around conversion to
      double.  This is inherently unsuitable for a good emulation of any
      floatx80 operation, even before considering that it is a particularly
      naive implementation using double (adding 1 then using log rather than
      attempting a better emulation using log1p).
      
      Reimplement using the soft-float operations, as was done for f2xm1; as
      in that case, m68k has related operations but not exactly this one and
      it seemed safest to implement directly rather than reusing the m68k
      code to avoid accumulation of errors.
      
      A test is included with many randomly generated inputs.  The
      assumption of the test is that the result in round-to-nearest mode
      should always be one of the two closest floating-point numbers to the
      mathematical value of y * log2(x + 1); the implementation aims to do
      somewhat better than that (about 70 correct bits before rounding).  I
      haven't investigated how accurate hardware is.
      
      Intel manuals describe a narrower range of valid arguments to this
      instruction than AMD manuals.  The implementation accepts the wider
      range (it's needed anyway for the core code to be reusable in a
      subsequent patch reimplementing fyl2x), but the test only has inputs
      in the narrower range so that it's valid on hardware that may reject
      or produce poor results for inputs outside that range.
      
      Code in the previous implementation that sets C2 for some out-of-range
      arguments is not carried forward to the new implementation; C2 is
      undefined for this instruction and I suspect that code was just
      cut-and-pasted from the trigonometric instructions (fcos, fptan, fsin,
      fsincos) where C2 *is* defined to be set for out-of-range arguments.
      
      Signed-off-by: default avatarJoseph Myers <joseph@codesourcery.com>
      
      Message-Id: <alpine.DEB.2.21.2006172320190.20587@digraph.polyomino.org.uk>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      5eebc49d
    • Joseph Myers's avatar
      target/i386: reimplement fprem, fprem1 using floatx80 operations · 5ef396e2
      Joseph Myers authored
      
      The x87 fprem and fprem1 emulation is currently based around
      conversion to double, which is inherently unsuitable for a good
      emulation of any floatx80 operation.  Reimplement using the soft-float
      floatx80 remainder operations.
      
      Signed-off-by: default avatarJoseph Myers <joseph@codesourcery.com>
      Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Message-Id: <alpine.DEB.2.21.2006081657200.23637@digraph.polyomino.org.uk>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      5ef396e2
    • Joseph Myers's avatar
      softfloat: return low bits of quotient from floatx80_modrem · 445810ec
      Joseph Myers authored
      
      Both x87 and m68k need the low parts of the quotient for their
      remainder operations.  Arrange for floatx80_modrem to track those bits
      and return them via a pointer.
      
      The architectures using float32_rem and float64_rem do not appear to
      need this information, so the *_rem interface is left unchanged and
      the information returned only from floatx80_modrem.  The logic used to
      determine the low 7 bits of the quotient for m68k
      (target/m68k/fpu_helper.c:make_quotient) appears completely bogus (it
      looks at the result of converting the remainder to integer, the
      quotient having been discarded by that point); this patch does not
      change that, but the m68k maintainers may wish to do so.
      
      Signed-off-by: default avatarJoseph Myers <joseph@codesourcery.com>
      Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Message-Id: <alpine.DEB.2.21.2006081656500.23637@digraph.polyomino.org.uk>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      445810ec
    • Joseph Myers's avatar
      softfloat: do not set denominator high bit for floatx80 remainder · 566601f1
      Joseph Myers authored
      
      The floatx80 remainder implementation unnecessarily sets the high bit
      of bSig explicitly.  By that point in the function, arguments that are
      invalid, zero, infinity or NaN have already been handled and
      subnormals have been through normalizeFloatx80Subnormal, so the high
      bit will already be set.  Remove the unnecessary code.
      
      Signed-off-by: default avatarJoseph Myers <joseph@codesourcery.com>
      Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Message-Id: <alpine.DEB.2.21.2006081656220.23637@digraph.polyomino.org.uk>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      566601f1
    • Joseph Myers's avatar
      softfloat: do not return pseudo-denormal from floatx80 remainder · b662495d
      Joseph Myers authored
      
      The floatx80 remainder implementation sometimes returns the numerator
      unchanged when the denominator is sufficiently larger than the
      numerator.  But if the value to be returned unchanged is a
      pseudo-denormal, that is incorrect.  Fix it to normalize the numerator
      in that case.
      
      Signed-off-by: default avatarJoseph Myers <joseph@codesourcery.com>
      Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Message-Id: <alpine.DEB.2.21.2006081655520.23637@digraph.polyomino.org.uk>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      b662495d
    • Joseph Myers's avatar
      softfloat: fix floatx80 remainder pseudo-denormal check for zero · 499a2f7b
      Joseph Myers authored
      
      The floatx80 remainder implementation ignores the high bit of the
      significand when checking whether an operand (numerator) with zero
      exponent is zero.  This means it mishandles a pseudo-denormal
      representation of 0x1p-16382L by treating it as zero.  Fix this by
      checking the whole significand instead.
      
      Signed-off-by: default avatarJoseph Myers <joseph@codesourcery.com>
      Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Message-Id: <alpine.DEB.2.21.2006081655180.23637@digraph.polyomino.org.uk>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      499a2f7b
    • Joseph Myers's avatar
      softfloat: merge floatx80_mod and floatx80_rem · 6b8b0136
      Joseph Myers authored
      
      The m68k-specific softfloat code includes a function floatx80_mod that
      is extremely similar to floatx80_rem, but computing the remainder
      based on truncating the quotient toward zero rather than rounding it
      to nearest integer.  This is also useful for emulating the x87 fprem
      and fprem1 instructions.  Change the floatx80_rem implementation into
      floatx80_modrem that can perform either operation, with both
      floatx80_rem and floatx80_mod as thin wrappers available for all
      targets.
      
      There does not appear to be any use for the _mod operation for other
      floating-point formats in QEMU (the only other architectures using
      _rem at all are linux-user/arm/nwfpe, for FPA emulation, and openrisc,
      for instructions that have been removed in the latest version of the
      architecture), so no change is made to the code for other formats.
      
      Signed-off-by: default avatarJoseph Myers <joseph@codesourcery.com>
      Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Message-Id: <alpine.DEB.2.21.2006081654280.23637@digraph.polyomino.org.uk>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      6b8b0136
    • Joseph Myers's avatar
      target/i386: reimplement f2xm1 using floatx80 operations · eca30647
      Joseph Myers authored
      
      The x87 f2xm1 emulation is currently based around conversion to
      double.  This is inherently unsuitable for a good emulation of any
      floatx80 operation, even before considering that it is a particularly
      naive implementation using double (computing with pow and then
      subtracting 1 rather than attempting a better emulation using expm1).
      
      Reimplement using the soft-float operations, including additions and
      multiplications with higher precision where appropriate to limit
      accumulation of errors.  I considered reusing some of the m68k code
      for transcendental operations, but the instructions don't generally
      correspond exactly to x87 operations (for example, m68k has 2^x and
      e^x - 1, but not 2^x - 1); to avoid possible accumulation of errors
      from applying multiple such operations each rounding to floatx80
      precision, I wrote a direct implementation of 2^x - 1 instead.  It
      would be possible in principle to make the implementation more
      efficient by doing the intermediate operations directly with
      significands, signs and exponents and not packing / unpacking floatx80
      format for each operation, but that would make it significantly more
      complicated and it's not clear that's worthwhile; the m68k emulation
      doesn't try to do that.
      
      A test is included with many randomly generated inputs.  The
      assumption of the test is that the result in round-to-nearest mode
      should always be one of the two closest floating-point numbers to the
      mathematical value of 2^x - 1; the implementation aims to do somewhat
      better than that (about 70 correct bits before rounding).  I haven't
      investigated how accurate hardware is.
      
      Signed-off-by: default avatarJoseph Myers <joseph@codesourcery.com>
      
      Message-Id: <alpine.DEB.2.21.2006112341010.18393@digraph.polyomino.org.uk>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      eca30647
    • Anthony PERARD's avatar
      xen: Actually fix build without passthrough · b00de3a5
      Anthony PERARD authored
      
      Fix typo.
      
      Fixes: acd0c941 ("xen: fix build without pci passthrough")
      Signed-off-by: default avatarAnthony PERARD <anthony.perard@citrix.com>
      Message-Id: <20200619103115.254127-1-anthony.perard@citrix.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      b00de3a5
    • Liao Pingfang's avatar
      Makefile: Install qemu-[qmp/ga]-ref.* into the directory "interop" · c13dba2c
      Liao Pingfang authored
      We need install qemu-[qmp/ga]-ref.* files into the subdirectory of qemu docs: interop.
      
      If we visit the following address and click the link to qemu-qmp-ref.html:
      https://www.qemu.org/docs/master/interop/bitmaps.html#basic-qmp-usage
      
      
      
      It will report following error:
      "
      Not Found
      The requested URL /docs/master/interop/qemu-qmp-ref.html was not found on this server.
      "
      
      Signed-off-by: default avatarLiao Pingfang <liao.pingfang@zte.com.cn>
      Reviewed-by: default avatarPhilippe Mathieu-Daudé <philmd@redhat.com>
      Message-Id: <1591663670-47712-1-git-send-email-wang.yi59@zte.com.cn>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      c13dba2c
    • Thomas Huth's avatar
      hw/scsi/megasas: Fix possible out-of-bounds array access in tracepoints · ee760ac8
      Thomas Huth authored
      Some tracepoints in megasas.c use a guest-controlled value as an index
      into the mfi_frame_desc[] array. Thus a malicious guest could cause an
      out-of-bounds error here. Fortunately, the impact is very low since this
      can only happen when the corresponding tracepoints have been enabled
      before, but the problem should be fixed anyway with a proper check.
      
      Buglink: https://bugs.launchpad.net/qemu/+bug/1882065
      
      
      Signed-off-by: default avatarThomas Huth <thuth@redhat.com>
      Message-Id: <20200615072629.32321-1-thuth@redhat.com>
      Reviewed-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      ee760ac8
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