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Commit db23e5d9 authored by Richard Henderson's avatar Richard Henderson Committed by Alistair Francis
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target/riscv: Replace riscv_cpu_is_32bit with riscv_cpu_mxl


Shortly, the set of supported XL will not be just 32 and 64,
and representing that properly using the enumeration will be
imperative.

Two places, booting and gdb, intentionally use misa_mxl_max
to emphasize the use of the reset value of misa.mxl, and not
the current cpu state.

Reviewed-by: default avatarLIU Zhiwei <zhiwei_liu@c-sky.com>
Reviewed-by: default avatarAlistair Francis <alistair.francis@wdc.com>
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-id: 20211020031709.359469-5-richard.henderson@linaro.org
Signed-off-by: default avatarAlistair Francis <alistair.francis@wdc.com>
parent e91a7227
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