[TEMP] Reachinf fix

include/revng/Support/MemoryAccess.h

@@ -45,6 +45,7 @@ public:
   MemoryAccess() :
     Type(Invalid),
     Base(nullptr),
+    AdditionalBase(nullptr),
     Offset(0),
     Factor(0),
     Size(0) {}
@@ -98,6 +99,10 @@ public:
       return (Base == Other.Base
               and Offset == Other.Offset
               and Factor == Other.Factor);
+    case RegisterAndRegisterAndOffset:
+      return (Base == Other.Base
+              and AdditionalBase == Other.AdditionalBase
+              and Factor == Other.Factor);
     case Absolute:
       return Offset == Other.Offset;
     }
@@ -141,6 +146,14 @@ public:
       return intersect({ Offset, Size }, { Other.Offset, Other.Size });
     }
 
+    if (Type == RegisterAndRegisterAndOffset && Other.Type == RegisterAndRegisterAndOffset) {
+      if (Base != Other.Base or AdditionalBase != Other.AdditionalBase or Factor != Other.Factor)
+        return true;
+
+      // WIP
+      return false;
+    }
+
     // Absolute addresses and CPUState never alias
     if ((Type == Absolute and Other.Type == CPUState)
         or (Type == CPUState and Other.Type == Absolute))
@@ -151,6 +164,11 @@ public:
         or (Type == RegisterAndOffset and Other.Type == Absolute))
       return true;
 
+    // Absolute addresses and RegisterAndOffset may always alias
+    if ((Type == Absolute and Other.Type == RegisterAndRegisterAndOffset)
+        or (Type == RegisterAndRegisterAndOffset and Other.Type == Absolute))
+      return true;
+
     // We have two absolute ranges, do they intersect?
     if (Type == Absolute and Other.Type == Absolute)
       return intersect({ Offset, Size }, { Other.Offset, Other.Size });
@@ -203,6 +221,7 @@ private:
     // Default situation: we can't handle this load
     Type = Invalid;
     Base = nullptr;
+    AdditionalBase = nullptr;
     Offset = 0;
     Factor = 1;
 
@@ -223,6 +242,8 @@ private:
       // This mainly aims to handle very simple variables stored on the stack
       llvm::Optional<uint64_t> Addend;
       llvm::Optional<uint64_t> Multiplier;
+      llvm::Optional<llvm::Value *> Additional;
+      bool IsAdditional;
       while (true) {
         switch (V->getOpcode()) {
         case llvm::Instruction::IntToPtr:
@@ -247,23 +268,83 @@ private:
 
         } break;
         case llvm::Instruction::Add: {
-          auto Operands = operandsByType<llvm::Instruction *,
-                                         llvm::ConstantInt *>(V);
-          llvm::Instruction *FirstOp;
-          llvm::ConstantInt *SecondOp;
-          std::tie(FirstOp, SecondOp) = Operands;
-          if (Multiplier || Addend || SecondOp == nullptr || FirstOp == nullptr)
-            return;
 
-          Addend = SecondOp->getLimitedValue();
-          V = FirstOp;
+          //V->dump();
+          bool ContinueInspection = true;
+
+          /*
+          auto Operands2 = operandsByType<llvm::User *,
+                                          llvm::Instruction *>(V);
+                                          */
+
+
+          llvm::Instruction *FirstOp2 = nullptr;
+          llvm::Instruction *SecondOp2 = nullptr;
+          //std::tie(FirstOp2Before, SecondOp2) = Operands2;
+          //FirstOp2->dump();
+          //SecondOp2->dump();
+          if (auto *Op = llvm::dyn_cast<llvm::Instruction>(V->getOperand(0))) {
+            FirstOp2 = Op;
+          }
+          if (auto *Op = llvm::dyn_cast<llvm::Instruction>(V->getOperand(1))) {
+            SecondOp2 = Op;
+          }
 
+          /*
+          llvm::BasicBlock *Parent = V->getParent();
+          if (Parent->getName() == "bb.examine_argument.0x3a") {
+            //dbg << "HERE\n";
+            V->dump();
+            //dbg << V->getOperand(0) << "\n";
+            //dbg << V->getOperand(1) << "\n";
+            //dbg << FirstOp2 << "\n";
+            //dbg << SecondOp2 << "\n";
+          }*/
+
+          if (Multiplier || Addend || SecondOp2 == nullptr || FirstOp2 == nullptr) {
+            ContinueInspection = true;
+          } else {
+            //dbg << "BEING MERE\n";
+            if ((FirstOp2->getOpcode() == llvm::Instruction::Shl)
+                and (SecondOp2->getOpcode() == llvm::Instruction::Load)) {
+                  //dbg << "BEING PERE\n";
+              llvm::Value *LoadOperand = SecondOp2->getOperand(0);
+              if (isVariable(LoadOperand)) {
+                //dbg << "BEING HERE!\n";
+                Additional = LoadOperand;
+                V = FirstOp2;
+                ContinueInspection = false;
+              }
+            }
+          }
+
+          if (ContinueInspection) {
+            auto Operands = operandsByType<llvm::Instruction *,
+                                           llvm::ConstantInt *>(V);
+            llvm::Instruction *FirstOp;
+            llvm::ConstantInt *SecondOp;
+            std::tie(FirstOp, SecondOp) = Operands;
+
+            if (Multiplier || Addend || SecondOp == nullptr || FirstOp == nullptr)
+              return;
+
+            Addend = SecondOp->getLimitedValue();
+            V = FirstOp;
+            //dbg << "BEING CIAO!\n";
+
+          }
         } break;
         case llvm::Instruction::Load: {
           llvm::Value *LoadOperand = V->getOperand(0);
           if (isVariable(LoadOperand)) {
-            Type = RegisterAndOffset;
+            if (IsAdditional) {
+              Type = RegisterAndRegisterAndOffset;
+            } else {
+              Type = RegisterAndOffset;
+            }
+
             Base = LoadOperand;
+            AdditionalBase = Additional.getValueOr(nullptr);
             Offset = Addend.getValueOr(0);
             Factor = Multiplier.getValueOr(1);
           }
@@ -277,8 +358,9 @@ private:
   }
 
 private:
-  enum { Invalid, CPUState, RegisterAndOffset, Absolute } Type;
+  enum { Invalid, CPUState, RegisterAndOffset, RegisterAndRegisterAndOffset, Absolute } Type;
   const llvm::Value *Base;
+  const llvm::Value *AdditionalBase;
   uint64_t Offset;
   uint64_t Factor;
   uint64_t Size;