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Created with Raphaël 2.2.010Jun987632130May2928262524232019181716151413target/riscv: rvv: Add tail agnostic for vector floating-point instructionstarget/riscv: rvv: Add tail agnostic for vector fix-point arithmetic instructionstarget/riscv: rvv: Add tail agnostic for vector integer merge and move instructionstarget/riscv: rvv: Add tail agnostic for vector integer comparison instructionstarget/riscv: rvv: Add tail agnostic for vector integer shift instructionstarget/riscv: rvv: Add tail agnostic for vx, vvm, vxm instructionstarget/riscv: rvv: Add tail agnostic for vector load / store instructionstarget/riscv: rvv: Add tail agnostic for vv instructionstarget/riscv: rvv: Early exit when vstart >= vltarget/riscv: rvv: Rename ambiguous esztarget/riscv: rvv: Prune redundant access_type parameter passedtarget/riscv: rvv: Prune redundant ESZ, DSZ parameter passedtarget/riscv/debug.c: keep experimental rv128 support workingtarget/riscv: Wake on VS-level external interruptshw/core/loader: return image sizes as ssize_thw/intc: sifive_plic: Avoid overflowing the addr_config bufferhw/riscv: virt: Generate fw_cfg DT node correctlytarget/riscv: add support for zmmul extension v0.1MAINTAINERS: Cover hw/core/uboot_image.h within Generic Loader sectionMerge tag 'pull-xen-20220609' of https://xenbits.xen.org/git-http/people/aperard/qemu-dm into staginginclude/hw/ide: Unexport pci_piix3_xen_ide_unplug()hw/ide/piix: Add some documentation to pci_piix3_xen_ide_unplug()hw/ide/piix: Remove redundant "piix3-ide-xen" device classMerge tag 'pull-target-arm-20220609' of https://git.linaro.org/people/pmaydell/qemu-arm into stagingMerge tag 'vfio-updates-20220608.0' of https://gitlab.com/alex.williamson/qemu into stagingtarget/arm: Add ID_AA64SMFR0_EL1target/arm: Add isar_feature_aa64_smetarget/arm: Export bfdotadd from vec_helper.ctarget/arm: Move expand_pred_h to vec_internal.htarget/arm: Use expand_pred_b in mve_helper.ctarget/arm: Move expand_pred_b to vec_internal.htarget/arm: Export sve contiguous ldst support functionstarget/arm: Split out load/store primitives to sve_ldst_internal.htarget/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_eltarget/arm: Use uint32_t instead of bitmap for sve vq'starget/arm: Merge aarch64_sve_zcr_get_valid_len into callertarget/arm: Do not use aarch64_sve_zcr_get_valid_len in resettarget/arm: Hoist arm_is_el2_enabled check in sve_exception_eltarget/arm: Use el_is_in_host for sve_exception_eltarget/arm: Use el_is_in_host for sve_zcr_len_for_el