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Created with Raphaël 2.2.025Oct232221201918171614131211target/sparc: Define features via cpu-feature.h.incconfigs: Enable MTTCG for sparc, sparc64target/sparc: Set TCG_GUEST_DEFAULT_MOtarget/sparc: Avoid helper_raise_exception in helper_st_asitarget/sparc: Implement check_align inlinetarget/sparc: Clear may_lookup for npc == DYNAMIC_PChw/arm/aspeed: Move AspeedSoCState::cpu/vic to Aspeed2400SoCStatehw/arm/aspeed: Move AspeedSoCState::a7mpcore to Aspeed2600SoCStatehw/arm/aspeed: Move AspeedSoCState::armv7m to Aspeed10x0SoCStatehw/arm/aspeed: Check 'memory' link is set in common aspeed_soc_realizehw/arm/aspeed: Introduce TYPE_ASPEED2400_SOChw/arm/aspeed: Introduce TYPE_ASPEED2600_SOChw/arm/aspeed: Introduce TYPE_ASPEED10X0_SOChw/arm/aspeed: Dynamically allocate AspeedMachineState::soc fieldhw/arm/aspeed: Rename aspeed_soc_realize() as AST2400/2500 specifichw/arm/aspeed: Rename aspeed_soc_init() as AST2400/2500 specifichw/arm/aspeed: Extract code common to all boards to a common fileMAINTAINERS: aspeed: Update Andrew's email addressMerge tag 'pull-tcg-20231023' of https://gitlab.com/rth7680/qemu into stagingMerge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into stagingMerge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into stagingMerge tag 'hw-misc-20231020' of https://github.com/philmd/qemu into stagingtarget/xtensa: Use tcg_gen_sextract_i32target/tricore: Use tcg_gen_*extract_tltarget/rx: Use tcg_gen_ext_i32target/m68k: Use tcg_gen_ext_i32target/i386: Use tcg_gen_ext_tltarget/arm: Use tcg_gen_ext_i64tcg: Define MO_TLtcg: Export tcg_gen_ext_{i32,i64,tl}tcg: add negsetconditarget/i386: Use i128 for 128 and 256-bit loads and storestcg: Add tcg_gen_{ld,st}_i128tcg: Optimize past conditional branchestcg: Use constant zero when expanding with divu2tcg: drop unused tcg_temp_free definetcg/s390x: Use tcg_use_softmmutcg/riscv: Use tcg_use_softmmutcg/riscv: Do not reserve TCG_GUEST_BASE_REG for guest_base zerotcg/ppc: Use tcg_use_softmmu