Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
L
libtcg
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Package Registry
Container Registry
Model registry
Operate
Environments
Terraform modules
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Anton
libtcg
Graph
dc14a7a6e95571122ec2428abb355fe2c43e05c6
Select Git revision
Branches
1
feature/libtcg-rebase
default
protected
1 result
You can move around the graph by using the arrow keys.
Begin with the selected commit
Created with Raphaël 2.2.0
10
Jul
9
8
7
6
4
3
1
30
Jun
29
28
27
26
25
24
23
target/mips/mxu: Add Q16SLL Q16SLR Q16SAR instructions
target/mips/mxu: Add D32SLL D32SLR D32SAR instructions
target/mips/mxu: Add D32SARL D32SARW instructions
target/mips/mxu: Add S32ALN S32LUI insns
target/mips/mxu: Add S32MUL S32MULU S32EXTR S32EXTRV insns
target/mips/mxu: Add S16LDD S16STD S16LDI S16SDI instructions
target/mips/mxu: Add S8STD S8LDI S8SDI instructions
target/mips/mxu: Add Q8ADDE Q8ACCE D8SUM D8SUMC instructions
target/mips/mxu: Add Q16ACC Q16ACCM D16ASUM instructions
target/mips/mxu: Add D32ADDC instruction
target/mips/mxu: Add D32ACC D32ACCM D32ASUM instructions
target/mips/mxu: Add D32ADD instruction
target/mips/mxu: Add Q16ADD instruction
target/mips/mxu: Add S16MAD instruction
target/mips/mxu: Add D16MADL instruction
target/mips/mxu: Add D16MACF D16MACE instructions
target/mips/mxu: Add D16MULF D16MULE instructions
target/mips/mxu: Add S32CPS D16CPS Q8ABD Q16SAT insns
target/mips/mxu: Add Q8ADD instruction
target/mips/mxu: Add S32SLT D16SLT D16AVG[R] Q8AVG[R] insns
target/mips/mxu: Fix D16MAX D16MIN Q8MAX Q8MIN instructions
target/mips/mxu: Add Q8SLT Q8SLTU instructions
target/mips/mxu: Add S32MADD/MADDU/MSUB/MSUBU instructions
target/mips/mxu: Add LXW LXB LXH LXBU LXHU instructions
target/mips: Add support of two XBurst CPUs
target/mips: Add emulation of MXU instructions for 32-bit load/store
hw/mips/loongson3_virt: Relax CPU restrictions for TCG
target/mips: Implement Loongson CSR instructions
Merge tag 'qga-pull-2023-07-10' of https://github.com/kostyanf14/qemu into staging
Merge tag 'pull-riscv-to-apply-20230710-1' of https://github.com/alistair23/qemu into staging
hw/pci/pci: Remove multifunction parameter from pci_create_simple_multifunction()
hw/i386/pc_piix: Move i440fx' realize near its qdev_new()
hw/pci-host/i440fx: Resolve i440fx_init()
hw/pci-host/i440fx: Add I440FX_HOST_PROP_PCI_TYPE property
hw/pci-host/i440fx: Add PCI_HOST_{ABOVE, BELOW}_4G_MEM_SIZE properties
hw/pci-host/i440fx: Add PCI_HOST_PROP_IO_MEM property
hw/pci-host/i440fx: Make MemoryRegion pointers accessible as properties
hw/pci-host/i440fx: Move i440fx_realize() into PCII440FXState section
hw/pci-host/i440fx: Have common names for some local variables
hw/pci-host/i440fx: Replace magic values by existing constants
Loading