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Created with Raphaël 2.2.020Sep1918161513121187654131Aug30target/loongarch: CPUCFG support LASXtarget/loongarch: Move simply DO_XX marcos togthertarget/loongarch: Implement xvld xvsttarget/loongarch: Implement xvshuf xvperm{i} xvshuf4itarget/loongarch: Implement xvpack xvpick xvilv{l/h}target/loongarch: Implement xvreplve xvinsve0 xvpickvetarget/loongarch: Implement xvinsgr2vr xvpickve2grtarget/loongarch: Implement xvbitsel xvsettarget/loongarch: Implement xvfcmptarget/loongarch: Implement xvseq xvsle xvslttarget/loongarch: Implement LASX fpu fcvt instructionstarget/loongarch: Implement LASX fpu arith instructionstarget/loongarch: Implement xvfrstptarget/loongarch: Implement xvbitclr xvbitset xvbitrevtarget/loongarch: Implement xvpcnttarget/loongarch: Implement xvclo xvclztarget/loongarch: Implement xvssrlrn xvssrarntarget/loongarch: Implement xvssrln xvssrantarget/loongarch: Implement xvsrlrn xvsrarntarget/loongarch: Implement xvsrln xvsrantarget/loongarch: Implement xvsrlr xvsrartarget/loongarch: Implement xvsllwil xvextltarget/loongarch: Implement xvsll xvsrl xvsra xvrotrtarget/loongarch: Implement LASX logic instructionstarget/loongarch: Implement xvldihw/tpm: spelling fixeshw/pci: spelling fixeshw/net: spelling fixesi386: spelling fixesbsd-user: spelling fixesppc: spelling fixestarget/loongarch: Implement xvmskltz/xvmskgez/xvmsknztarget/loongarch: Implement xvsigncovtarget/loongarch: Implement vext2xvtarget/loongarch: Implement xvexthtarget/loongarch: Implement xvsattarget/loongarch; Implement xvdiv/xvmodtarget/loongarch: Implement xvmadd/xvmsub/xvmaddw{ev/od}target/loongarch: Implement xvmul/xvmuh/xvmulw{ev/od}target/loongarch: Implement xvmax/xvmin