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Created with Raphaël 2.2.04Jul32130Jun29282726242322212019161514131413111091091098hw/rtc/ls7a_rtc: Remove unimplemented device in realized functionhw/rtc/ls7a_rtc: Fix timer call back functionhw/rtc/ls7a_rtc: Fix uninitialied bugs and toymatch writing functionhw/intc/loongarch_pch_msi: Fix msi vector convertiontarget/loongarch: Update READMEdefault-configs: Add loongarch linux-user supporttarget/loongarch: Adjust functions and structure to support user-modetarget/loongarch: remove unused include hw/loader.htarget/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong exceptiontarget/loongarch: Fix missing update CSR_BADVtarget/loongarch: remove badaddr from CPULoongArchscripts: add loongarch64 binfmt configlinux-user: Add LoongArch cpu_loop supportlinux-user: Add LoongArch syscall supportlinux-user: Add LoongArch elf supportlinux-user: Add LoongArch signal supportlinux-user: Add LoongArch generic header filesMerge tag 'pull-riscv-to-apply-20220703-1' of github.com:alistair23/qemu into stagingtarget/riscv: Update default priority table for local interruptstarget/riscv: Remove CSRs that set/clear an IMSIC interrupt file bitstarget/riscv: Set minumum priv spec version for mcountinhibithw/riscv: boot: Reduce FDT address alignment constraintstarget/riscv: Don't force update priv spec version to latesttarget/riscv: Ibex: Support priv version 1.11target/riscv: Fixup MSECCFG minimum priv checktarget/riscv: Support mcycle/minstret write operationtarget/riscv: Add support for hpmcounters/hpmeventstarget/riscv: Implement mcountinhibit CSRtarget/riscv: pmu: Make number of counters configurabletarget/riscv: pmu: Rename the counters extension to pmutarget/riscv: Implement PMU CSR predicate function for S-modetarget/riscv: Fix PMU CSR predicate functiontarget/riscv/pmp: guard against PMP ranges with a negative sizetarget/riscv: Minimize the calls to decode_save_opctarget/riscv: Remove generate_exception_mtvaltarget/riscv: Set env->bins in gen_exception_illegaltarget/riscv: Remove condition guarding register zero for auipc and luiMerge tag 'bsd-user-syscall-2022q2b-pull-request' of ssh://github.com/qemu-bsd-user/qemu-bsd-user into stagingbsd-user: Remove stray 'inline' from do_bsd_closebsd-user: Implement undelete