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  1. Oct 01, 2021
  2. Sep 30, 2021
    • Peter Maydell's avatar
      Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210930' into staging · bb4aa8f5
      Peter Maydell authored
      
      target-arm queue:
       * allwinner-h3: Switch to SMC as PSCI conduit
       * arm: tcg: Adhere to SMCCC 1.3 section 5.2
       * xlnx-zcu102, xlnx-versal-virt: Support BBRAM and eFUSE devices
       * gdbstub related code cleanups
       * Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML
       * Use _init vs _new convention in bus creation function names
       * sabrelite: Connect SPI flash CS line to GPIO3_19
      
      # gpg: Signature made Thu 30 Sep 2021 16:11:20 BST
      # gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
      # gpg:                issuer "peter.maydell@linaro.org"
      # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
      # gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
      # gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
      # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE
      
      * remotes/pmaydell/tags/pull-target-arm-20210930: (22 commits)
        hw/arm: sabrelite: Connect SPI flash CS line to GPIO3_19
        ide: Rename ide_bus_new() to ide_bus_init()
        qbus: Rename qbus_create() to qbus_new()
        qbus: Rename qbus_create_inplace() to qbus_init()
        pci: Rename pci_root_bus_new_inplace() to pci_root_bus_init()
        ipack: Rename ipack_bus_new_inplace() to ipack_bus_init()
        scsi: Replace scsi_bus_new() with scsi_bus_init(), scsi_bus_init_named()
        target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XML
        target/arm: Move gdbstub related code out of helper.c
        target/arm: Fix coding style issues in gdbstub code in helper.c
        configs: Don't include 32-bit-only GDB XML in aarch64 linux configs
        docs/system/arm: xlnx-versal-virt: BBRAM and eFUSE Usage
        hw/arm: xlnx-zcu102: Add Xilinx eFUSE device
        hw/arm: xlnx-zcu102: Add Xilinx BBRAM device
        hw/arm: xlnx-versal-virt: Add Xilinx eFUSE device
        hw/arm: xlnx-versal-virt: Add Xilinx BBRAM device
        hw/nvram: Introduce Xilinx battery-backed ram
        hw/nvram: Introduce Xilinx ZynqMP eFuse device
        hw/nvram: Introduce Xilinx Versal eFuse device
        hw/nvram: Introduce Xilinx eFuse QOM
        ...
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      bb4aa8f5
    • Peter Maydell's avatar
      Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging · 0021c476
      Peter Maydell authored
      
      * SGX implementation for x86
      * Miscellaneous bugfixes
      * Fix dependencies from ROMs to qtests
      
      # gpg: Signature made Thu 30 Sep 2021 14:30:35 BST
      # gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
      # gpg:                issuer "pbonzini@redhat.com"
      # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
      # gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
      # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
      #      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83
      
      * remotes/bonzini-gitlab/tags/for-upstream: (33 commits)
        meson_options.txt: Switch the default value for the vnc option to 'auto'
        build-sys: add HAVE_IPPROTO_MPTCP
        memory: Add tracepoint for dirty sync
        memory: Name all the memory listeners
        target/i386: Fix memory leak in sev_read_file_base64()
        tests: qtest: bios-tables-test depends on the unpacked edk2 ROMs
        meson: unpack edk2 firmware even if --disable-blobs
        target/i386: Add the query-sgx-capabilities QMP command
        target/i386: Add HMP and QMP interfaces for SGX
        docs/system: Add SGX documentation to the system manual
        sgx-epc: Add the fill_device_info() callback support
        i440fx: Add support for SGX EPC
        q35: Add support for SGX EPC
        i386: acpi: Add SGX EPC entry to ACPI tables
        i386/pc: Add e820 entry for SGX EPC section(s)
        hw/i386/pc: Account for SGX EPC sections when calculating device memory
        hw/i386/fw_cfg: Set SGX bits in feature control fw_cfg accordingly
        Adjust min CPUID level to 0x12 when SGX is enabled
        i386: Propagate SGX CPUID sub-leafs to KVM
        i386: kvm: Add support for exposing PROVISIONKEY to guest
        ...
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      0021c476
    • Peter Maydell's avatar
      Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.2-20210930' into staging · fce8f773
      Peter Maydell authored
      
      ppc patch queue for 2021-09-30
      
      Here's the next batch of ppc related patches for qemu-6.2.  Highlights
      are:
       * Fixes for several TCG math instructions from the El Dorado Institute
       * A number of improvements to the powernv machine type
       * Support for a new DEVICE_UNPLUG_GUEST_ERROR QAPI event from Daniel
         Barboza
       * Support for the new FORM2 PAPR NUMA representation.  This allows
         more specific NUMA distances, as well as asymmetric configurations
       * Fix for 64-bit decrementer (used on MicroWatt CPUs)
       * Assorted fixes and cleanups
       * A number of updates to MAINTAINERS
      
      Note that the DEVICE_UNPLUG_GUEST_ERROR stuff includes changes to
      files outside my normal area, but has suitable Acks.
      
      The MAINTAINERS updates are mostly about marking minor platforms
      unmaintained / orphaned, and moving some pieces away from myself and
      Greg.  As we move onto other projects, we're going to need to drop
      more of the ppc maintainership, though we're hoping we can avoid too
      abrupt a change.
      
      # gpg: Signature made Thu 30 Sep 2021 06:42:41 BST
      # gpg:                using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392
      # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full]
      # gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full]
      # gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full]
      # gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown]
      # Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392
      
      * remotes/dg-gitlab/tags/ppc-for-6.2-20210930: (44 commits)
        MAINTAINERS: Demote sPAPR from "Supported" to "Maintained"
        MAINTAINERS: Add information for OpenPIC
        MAINTAINERS: Remove David & Greg as reviewers/co-maintainers of powernv
        MAINTAINERS: Orphan obscure ppc platforms
        MAINTAINERS: Remove David & Greg as reviewers for a number of boards
        MAINTAINERS: Remove machine specific files from ppc TCG CPUs entry
        spapr/xive: Fix kvm_xive_source_reset trace event
        spapr_numa.c: fixes in spapr_numa_FORM2_write_rtas_tables()
        hw/intc: openpic: Clean up the styles
        hw/intc: openpic: Drop Raven related codes
        hw/intc: openpic: Correct the reset value of IPIDR for FSL chipset
        target/ppc: Fix 64-bit decrementer
        target/ppc: Convert debug to trace events (decrementer and IRQ)
        spapr_numa.c: handle auto NUMA node with no distance info
        spapr_numa.c: FORM2 NUMA affinity support
        spapr: move FORM1 verifications to post CAS
        spapr_numa.c: rename numa_assoc_array to FORM1_assoc_array
        spapr_numa.c: parametrize FORM1 macros
        spapr_numa.c: scrap 'legacy_numa' concept
        spapr_numa.c: split FORM1 code into helpers
        ...
      
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      fce8f773
    • Thomas Huth's avatar
      meson_options.txt: Switch the default value for the vnc option to 'auto' · c1de5858
      Thomas Huth authored
      
      There is no reason why VNC should always be enabled and not be set to
      the default value. We already switched the setting in the "configure"
      script in commit 3a6a1256 ("configure: Allow vnc to get disabled with
      --without-default-features"), so let's do that in meson_options.txt now,
      too.
      
      Signed-off-by: default avatarThomas Huth <thuth@redhat.com>
      Reviewed-by: default avatarEric Blake <eblake@redhat.com>
      Message-Id: <20210903081358.956267-3-thuth@redhat.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      c1de5858
    • Marc-André Lureau's avatar
      build-sys: add HAVE_IPPROTO_MPTCP · 653163fc
      Marc-André Lureau authored
      
      The QAPI schema shouldn't rely on C system headers #define, but on
      configure-time project #define, so we can express the build condition in
      a C-independent way.
      
      Signed-off-by: default avatarMarc-André Lureau <marcandre.lureau@redhat.com>
      Message-Id: <20210907121943.3498701-3-marcandre.lureau@redhat.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      653163fc
    • Peter Xu's avatar
      memory: Add tracepoint for dirty sync · fcb3ab34
      Peter Xu authored
      
      Trace at memory_region_sync_dirty_bitmap() for log_sync() or global_log_sync()
      on memory regions.  One trace line should suffice when it finishes, so as to
      estimate the time used for each log sync process.
      
      Signed-off-by: default avatarPeter Xu <peterx@redhat.com>
      Message-Id: <20210817013706.30986-1-peterx@redhat.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      fcb3ab34
    • Peter Xu's avatar
      memory: Name all the memory listeners · 142518bd
      Peter Xu authored
      
      Provide a name field for all the memory listeners.  It can be used to identify
      which memory listener is which.
      
      Signed-off-by: default avatarPeter Xu <peterx@redhat.com>
      Reviewed-by: default avatarDavid Hildenbrand <david@redhat.com>
      Message-Id: <20210817013553.30584-2-peterx@redhat.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      142518bd
    • Peter Maydell's avatar
      target/i386: Fix memory leak in sev_read_file_base64() · 523a3d95
      Peter Maydell authored
      
      In sev_read_file_base64() we call g_file_get_contents(), which
      allocates memory for the file contents.  We then base64-decode the
      contents (which allocates another buffer for the decoded data), but
      forgot to free the memory for the original file data.
      
      Use g_autofree to ensure that the file data is freed.
      
      Fixes: Coverity CID 1459997
      Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      Reviewed-by: default avatarPhilippe Mathieu-Daudé <philmd@redhat.com>
      Message-Id: <20210820165650.2839-1-peter.maydell@linaro.org>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      523a3d95
    • Paolo Bonzini's avatar
      tests: qtest: bios-tables-test depends on the unpacked edk2 ROMs · 809954ef
      Paolo Bonzini authored
      
      Skip the test if bzip2 is not available, and run it after they are
      uncompressed.
      
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      Message-Id: <20210923105529.3845741-2-pbonzini@redhat.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      809954ef
    • Paolo Bonzini's avatar
      meson: unpack edk2 firmware even if --disable-blobs · e49c0ef6
      Paolo Bonzini authored
      
      The edk2 firmware blobs are needed to run bios-tables-test.  Unpack
      them if any UEFI-enabled target is selected, so that the test can run.
      This is a bit more than is actually necessary, since bios-tables-test
      does not run for all UEFI-enabled targets, but it is the easiest
      way to write this logic.
      
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      Message-Id: <20210923105529.3845741-1-pbonzini@redhat.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      e49c0ef6
    • Yang Zhong's avatar
      target/i386: Add the query-sgx-capabilities QMP command · 0205c4fa
      Yang Zhong authored
      
      Libvirt can use query-sgx-capabilities to get the host
      sgx capabilities to decide how to allocate SGX EPC size to VM.
      
      Signed-off-by: default avatarYang Zhong <yang.zhong@intel.com>
      Message-Id: <20210910102258.46648-3-yang.zhong@intel.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      0205c4fa
    • Yang Zhong's avatar
      target/i386: Add HMP and QMP interfaces for SGX · 57d874c4
      Yang Zhong authored
      
      The QMP and HMP interfaces can be used by monitor or QMP tools to retrieve
      the SGX information from VM side when SGX is enabled on Intel platform.
      
      Signed-off-by: default avatarYang Zhong <yang.zhong@intel.com>
      Message-Id: <20210910102258.46648-2-yang.zhong@intel.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      57d874c4
    • Sean Christopherson's avatar
      docs/system: Add SGX documentation to the system manual · c5348c6a
      Sean Christopherson authored
      
      Signed-off-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
      Signed-off-by: default avatarYang Zhong <yang.zhong@intel.com>
      Message-Id: <20210719112136.57018-34-yang.zhong@intel.com>
      [Convert to reStructuredText, and adopt the standard === --- ~~~ headings
       suggested for example by Linux. - Paolo]
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      c5348c6a
    • Yang Zhong's avatar
      sgx-epc: Add the fill_device_info() callback support · a7c565a9
      Yang Zhong authored
      
      Since there is no fill_device_info() callback support, and when we
      execute "info memory-devices" command in the monitor, the segfault
      will be found.
      
      This patch will add this callback support and "info memory-devices"
      will show sgx epc memory exposed to guest. The result as below:
      
      qemu) info memory-devices
      Memory device [sgx-epc]: ""
        memaddr: 0x180000000
        size: 29360128
        memdev: /objects/mem1
      Memory device [sgx-epc]: ""
        memaddr: 0x181c00000
        size: 10485760
        memdev: /objects/mem2
      
      Signed-off-by: default avatarYang Zhong <yang.zhong@intel.com>
      Message-Id: <20210719112136.57018-33-yang.zhong@intel.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      a7c565a9
    • Sean Christopherson's avatar
      i440fx: Add support for SGX EPC · fb6986a2
      Sean Christopherson authored
      
      Enable SGX EPC virtualization, which is currently only support by KVM.
      
      Signed-off-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
      Signed-off-by: default avatarYang Zhong <yang.zhong@intel.com>
      Message-Id: <20210719112136.57018-22-yang.zhong@intel.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      fb6986a2
    • Sean Christopherson's avatar
      q35: Add support for SGX EPC · 97488c63
      Sean Christopherson authored
      
      Enable SGX EPC virtualization, which is currently only support by KVM.
      
      Signed-off-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
      Signed-off-by: default avatarYang Zhong <yang.zhong@intel.com>
      Message-Id: <20210719112136.57018-21-yang.zhong@intel.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      97488c63
    • Sean Christopherson's avatar
      i386: acpi: Add SGX EPC entry to ACPI tables · c8a9899c
      Sean Christopherson authored
      
      The ACPI Device entry for SGX EPC is essentially a hack whose primary
      purpose is to provide software with a way to autoprobe SGX support,
      e.g. to allow software to implement SGX support as a driver.  Details
      on the individual EPC sections are not enumerated through ACPI tables,
      i.e. software must enumerate the EPC sections via CPUID.  Furthermore,
      software expects to see only a single EPC Device in the ACPI tables
      regardless of the number of EPC sections in the system.
      
      However, several versions of Windows do rely on the ACPI tables to
      enumerate the address and size of the EPC.  So, regardless of the number
      of EPC sections exposed to the guest, create exactly *one* EPC device
      with a _CRS entry that spans the entirety of all EPC sections (which are
      guaranteed to be contiguous in Qemu).
      
      Note, NUMA support for EPC memory is intentionally not considered as
      enumerating EPC NUMA information is not yet defined for bare metal.
      
      Signed-off-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
      Signed-off-by: default avatarYang Zhong <yang.zhong@intel.com>
      Message-Id: <20210719112136.57018-20-yang.zhong@intel.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      c8a9899c
    • Sean Christopherson's avatar
      i386/pc: Add e820 entry for SGX EPC section(s) · 1ed1ccc5
      Sean Christopherson authored
      
      Note that SGX EPC is currently guaranteed to reside in a single
      contiguous chunk of memory regardless of the number of EPC sections.
      
      Signed-off-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
      Signed-off-by: default avatarYang Zhong <yang.zhong@intel.com>
      Message-Id: <20210719112136.57018-19-yang.zhong@intel.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      1ed1ccc5
    • Sean Christopherson's avatar
      hw/i386/pc: Account for SGX EPC sections when calculating device memory · 0cf4ce00
      Sean Christopherson authored
      
      Add helpers to detect if SGX EPC exists above 4g, and if so, where SGX
      EPC above 4g ends.  Use the helpers to adjust the device memory range
      if SGX EPC exists above 4g.
      
      For multiple virtual EPC sections, we just put them together physically
      contiguous for the simplicity because we don't support EPC NUMA affinity
      now. Once the SGX EPC NUMA support in the kernel SGX driver, we will
      support this in the future.
      
      Note that SGX EPC is currently hardcoded to reside above 4g.
      
      Signed-off-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
      Signed-off-by: default avatarYang Zhong <yang.zhong@intel.com>
      Message-Id: <20210719112136.57018-18-yang.zhong@intel.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      0cf4ce00
    • Sean Christopherson's avatar
      hw/i386/fw_cfg: Set SGX bits in feature control fw_cfg accordingly · e2560114
      Sean Christopherson authored
      
      Request SGX an SGX Launch Control to be enabled in FEATURE_CONTROL
      when the features are exposed to the guest. Our design is the SGX
      Launch Control bit will be unconditionally set in FEATURE_CONTROL,
      which is unlike host bios.
      
      Signed-off-by: default avatarSean Christopherson <sean.j.christopherson@intel.com>
      Signed-off-by: default avatarYang Zhong <yang.zhong@intel.com>
      Message-Id: <20210719112136.57018-17-yang.zhong@intel.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      e2560114
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