- Jun 21, 2021
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David Hildenbrand authored
Let's check for S390_FEAT_VECTOR_ENH and set HWCAP_S390_VXRS_EXT accordingly. Add all missing HWCAP defined in upstream Linux. Cc: Laurent Vivier <laurent@vivier.eu> Acked-by:
Laurent Vivier <laurent@vivier.eu> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-25-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
For IEEE functions, we can reuse the softfloat implementations. For the other functions, implement it generically for 32bit/64bit/128bit - carefully taking care of all weird special cases according to the tables defined in the PoP. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-24-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-23-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-22-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-21-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-20-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
128 bit -> 64 bit, there is only a single element to process. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-19-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
64 bit -> 128 bit, there is only a single final element. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-18-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-17-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
In addition to 32/128bit variants, we also have to support the "Signal-on-QNaN (SQ)" bit. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-16-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-15-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
In case of 128bit, we always have a single element. Add new helpers for reading/writing 32/128 bit floats. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-14-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Fortunately, we only need the Doubleword implementation. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-13-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-12-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
... and prepare for 32/128 bit support. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-11-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-10-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-9-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-8-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-7-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Pass the m5 field via simd_data() and don't provide specialized handlers for single-element variants. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-6-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Let's rework our macros and simplify. We still need helper functions in most cases due to the different parameters types. Next, we'll only have 32/128bit variants for vfi and vfsq, so special case the others. Note that for vfsq, the XxC and erm passed in the simd_data() will never be set, resulting in the same behavior. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-5-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Let's simplify, reworking our handler generation, passing the whole "m5" register content and not providing specialized handlers for "se", and reading/writing proper float64 values using new helpers. Suggested-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-4-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Let's use the correct name. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-3-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
In case we encounter a NaN, we have to return the smallest possible number, corresponding to either 0 or the maximum negative number. This seems to differ from IEEE handling as implemented in softfloat, whereby we return the biggest possible number. While at it, use float32_to_uint64() in the CLGEB handler. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-2-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Cornelia Huck authored
With commit 0280b3eb ("s390x/kvm: use cpu model for gscb on compat machines"), we removed any calls to kvm_s390_get_gs() in favour of a different mechanism. Let's remove the unused kvm_s390_get_gs(), and with it the now unneeded cap_gs as well. Signed-off-by:
Cornelia Huck <cohuck@redhat.com> Reviewed-by:
Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by:
Thomas Huth <thuth@redhat.com> Message-Id: <20210602125050.492500-1-cohuck@redhat.com>
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- Jun 18, 2021
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Peter Maydell authored
VFIO update 2021-06-18 * VFIO migration documentation (Tarun Gupta) * Fix SaveVMHandler de-registration (Kunkun Jiang) * Fix vmstate change transition (Kirti Wankhede) # gpg: Signature made Fri 18 Jun 2021 16:20:34 BST # gpg: using RSA key 42F6C04E540BD1A99E7B8A90239B9B6E3BB08B22 # gpg: issuer "alex.williamson@redhat.com" # gpg: Good signature from "Alex Williamson <alex.williamson@redhat.com>" [full] # gpg: aka "Alex Williamson <alex@shazbot.org>" [full] # gpg: aka "Alex Williamson <alwillia@redhat.com>" [full] # gpg: aka "Alex Williamson <alex.l.williamson@gmail.com>" [full] # Primary key fingerprint: 42F6 C04E 540B D1A9 9E7B 8A90 239B 9B6E 3BB0 8B22 * remotes/awilliam/tags/vfio-update-20210618.0: vfio/migration: Correct device state from vmstate change for savevm case vfio: Fix unregister SaveVMHandler in vfio_migration_finalize docs/devel: Add VFIO device migration documentation Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Kirti Wankhede authored
Set _SAVING flag for device state from vmstate change handler when it gets called from savevm. Currently State transition savevm/suspend is seen as: _RUNNING -> _STOP -> Stop-and-copy -> _STOP State transition savevm/suspend should be: _RUNNING -> Stop-and-copy -> _STOP State transition from _RUNNING to _STOP occurs from vfio_vmstate_change() where when vmstate changes from running to !running, _RUNNING flag is reset but at the same time when vfio_vmstate_change() is called for RUN_STATE_SAVE_VM, _SAVING bit should be set. Reported by: Yishai Hadas <yishaih@nvidia.com> Signed-off-by:
Kirti Wankhede <kwankhede@nvidia.com> Message-Id: <1623177441-27496-1-git-send-email-kwankhede@nvidia.com> Signed-off-by:
Alex Williamson <alex.williamson@redhat.com>
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Kunkun Jiang authored
In the vfio_migration_init(), the SaveVMHandler is registered for VFIO device. But it lacks the operation of 'unregister'. It will lead to 'Segmentation fault (core dumped)' in qemu_savevm_state_setup(), if performing live migration after a VFIO device is hot deleted. Fixes: 7c2f5f75 (vfio: Register SaveVMHandlers for VFIO device) Reported-by:
Qixin Gan <ganqixin@huawei.com> Signed-off-by:
Kunkun Jiang <jiangkunkun@huawei.com> Message-Id: <20210527123101.289-1-jiangkunkun@huawei.com> Reviewed by: Kirti Wankhede <kwankhede@nvidia.com> Signed-off-by:
Alex Williamson <alex.williamson@redhat.com>
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Tarun Gupta authored
Document interfaces used for VFIO device migration. Added flow of state changes during live migration with VFIO device. Reviewed-by:
Cornelia Huck <cohuck@redhat.com> Co-developed-by:
Kirti Wankhede <kwankhede@nvidia.com> Signed-off-by:
Kirti Wankhede <kwankhede@nvidia.com> Signed-off-by:
Tarun Gupta <targupta@nvidia.com> Message-Id: <20210418122251.88809-1-targupta@nvidia.com> Signed-off-by:
Alex Williamson <alex.williamson@redhat.com>
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Peter Maydell authored
audio: bugfix collection. # gpg: Signature made Thu 17 Jun 2021 13:40:56 BST # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/audio-20210617-pull-request: coreaudio: Fix output stream format settings audio: Fix format specifications of debug logs hw/audio/sb16: Avoid assertion by restricting I/O sampling rate range jackaudio: avoid that the client name contains the word (NULL) audio: move code to audio/audio.c paaudio: remove unused stream flags alsaaudio: remove #ifdef DEBUG to avoid bit rot Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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- Jun 17, 2021
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Peter Maydell authored
* avoid deprecation warnings for SASL on macOS 10.11 or newer * fix -readconfig when config blocks have an id (like [chardev "qmp"]) * Error* initialization fixes * Improvements to ESP emulation (Mark) * Allow creating noreserve memory backends (David) * Improvements to query-memdev (David) * Bump compiler to C11 (Richard) * First round of SVM fixes from GSoC project (Lara) # gpg: Signature made Wed 16 Jun 2021 16:37:49 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (45 commits) configure: Remove probe for _Static_assert qemu/compiler: Remove QEMU_GENERIC include/qemu/lockable: Use _Generic instead of QEMU_GENERIC util: Use unique type for QemuRecMutex in thread-posix.h util: Pass file+line to qemu_rec_mutex_unlock_impl util: Use real functions for thread-posix QemuRecMutex softfloat: Use _Generic instead of QEMU_GENERIC configure: Use -std=gnu11 target/i386: Added Intercept CR0 writes check target/i386: Added consistency checks for CR0 target/i386: Added consistency checks for VMRUN intercept and ASID target/i386: Refactored intercept checks into cpu_svm_has_intercept configure: map x32 to cpu_family x86_64 for meson hmp: Print "reserve" property of memory backends with "info memdev" qmp: Include "reserve" property of memory backends hmp: Print "share" property of memory backends with "info memdev" qmp: Include "share" property of memory backends qmp: Clarify memory backend properties returned via query-memdev hostmem: Wire up RAM_NORESERVE via "reserve" property util/mmap-alloc: Support RAM_NORESERVE via MAP_NORESERVE under Linux ... Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Akihiko Odaki authored
Before commit 7d6948cd, it was coded to retrieve the initial output stream format settings, modify the frame rate, and set again. However, I removed a frame rate modification code by mistake in the commit. It also assumes the initial output stream format is consistent with what QEMU expects, but that expectation is not in the code, which makes it harder to understand and will lead to breakage if the initial settings change. This change explicitly sets all of the output stream settings to solve these problems. Signed-off-by:
Akihiko Odaki <akihiko.odaki@gmail.com> Message-Id: <20210616141721.54091-1-akihiko.odaki@gmail.com> Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com>
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Akihiko Odaki authored
Signed-off-by:
Akihiko Odaki <akihiko.odaki@gmail.com> Message-id: 20210616141411.53892-1-akihiko.odaki@gmail.com Message-Id: <20210616141411.53892-1-akihiko.odaki@gmail.com> Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com>
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Philippe Mathieu-Daudé authored
While the SB16 seems to work up to 48000 Hz, the "Sound Blaster Series Hardware Programming Guide" limit the sampling range from 4000 Hz to 44100 Hz (Section 3-9, 3-10: Digitized Sound I/O Programming, tables 3-2 and 3-3). Later, section 6-15 (DSP Commands) is more specific regarding the 41h / 42h registers (Set digitized sound output sampling rate): Valid sampling rates range from 5000 to 45000 Hz inclusive. There is no comment regarding error handling if the register is filled with an out-of-range value. (See also section 3-28 "8-bit or 16-bit Auto-initialize Transfer"). Assume limits are enforced in hardware. This fixes triggering an assertion in audio_calloc(): #1 abort #2 audio_bug audio/audio.c:119:9 #3 audio_calloc audio/audio.c:154:9 #4 audio_pcm_sw_alloc_resources_out audio/audio_template.h:116:15 #5 audio_pcm_sw_init_out audio/audio_template.h:175:11 #6 audio_pcm_create_voice_pair_out audio/audio_template.h:410:9 #7 AUD_open_out audio/audio_template.h:503:14 #8 continue_dma8 hw/audio/sb16.c:216:20 #9 dma_cmd8 hw/audio/sb16.c:276:5 #10 command hw/audio/sb16.c:0 #11 dsp_write hw/audio/sb16.c:949:13 #12 portio_write softmmu/ioport.c:205:13 #13 memory_region_write_accessor softmmu/memory.c:491:5 #14 access_with_adjusted_size softmmu/memory.c:552:18 #15 memory_region_dispatch_write softmmu/memory.c:0:13 #16 flatview_write_continue softmmu/physmem.c:2759:23 #17 flatview_write softmmu/physmem.c:2799:14 #18 address_space_write softmmu/physmem.c:2891:18 #19 cpu_outw softmmu/ioport.c:70:5 [*] http://www.baudline.com/solutions/full_duplex/sb16_pci/index.html OSS-Fuzz Report: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=29174 Fixes: 85571bc7 ("audio merge (malc)") Buglink: https://bugs.launchpad.net/bugs/1910603 Tested-by:
Qiang Liu <cyruscyliu@gmail.com> Reviewed-by:
Qiang Liu <cyruscyliu@gmail.com> Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210616104349.2398060-1-f4bug@amsat.org> Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com>
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Volker Rümelin authored
Currently with jackaudio client name and qemu guest name unset, the JACK client names are out-(NULL) and in-(NULL). These names are user visible in the patch bay. Replace the function call to qemu_get_vm_name() with a call to audio_application_name() which replaces NULL with "qemu" to have more descriptive names. Signed-off-by:
Volker Rümelin <vr_qemu@t-online.de> Message-Id: <20210517194604.2545-4-vr_qemu@t-online.de> Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com>
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Volker Rümelin authored
Move the code to generate the pa_context_new() application name argument to a function in audio/audio.c. The new function audio_application_name() will also be used in the jackaudio backend. Signed-off-by:
Volker Rümelin <vr_qemu@t-online.de> Message-Id: <20210517194604.2545-3-vr_qemu@t-online.de> Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com>
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Volker Rümelin authored
In current code there are no calls to pa_stream_get_latency() or pa_stream_get_time() to receive latency or time information. Remove the flags PA_STREAM_INTERPOLATE_TIMING and PA_STREAM_AUTO_TIMING_UPDATE which instruct PulseAudio to calculate this information in regular intervals. Signed-off-by:
Volker Rümelin <vr_qemu@t-online.de> Message-Id: <20210517194604.2545-2-vr_qemu@t-online.de> Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com>
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Volker Rümelin authored
Merge the #ifdef DEBUG code with the if statement a few lines above to avoid bit rot. Suggested-by:
Gerd Hoffmann <kraxel@redhat.com> Signed-off-by:
Volker Rümelin <vr_qemu@t-online.de> Message-Id: <20210517194604.2545-1-vr_qemu@t-online.de> Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com>
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Peter Maydell authored
Change to -std=gnu11. Replace QEMU_GENERIC with _Generic. Remove configure detect of _Static_assert. # gpg: Signature made Wed 16 Jun 2021 02:32:32 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth-gitlab/tags/pull-c11-20210615: configure: Remove probe for _Static_assert qemu/compiler: Remove QEMU_GENERIC include/qemu/lockable: Use _Generic instead of QEMU_GENERIC util: Use unique type for QemuRecMutex in thread-posix.h util: Pass file+line to qemu_rec_mutex_unlock_impl util: Use real functions for thread-posix QemuRecMutex softfloat: Use _Generic instead of QEMU_GENERIC configure: Use -std=gnu11 Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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- Jun 16, 2021
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Peter Maydell authored
target-arm queue: * hw/intc/arm_gicv3_cpuif: Tolerate spurious EOIR writes * handle some UNALLOCATED decode cases correctly rather than asserting * hw: virt: consider hw_compat_6_0 * hw/arm: add quanta-gbs-bmc machine * hw/intc/armv7m_nvic: Remove stale comment * target/arm: Fix mte page crossing test * hw/arm: quanta-q71l add pca954x muxes * target/arm: First few parts of MVE support # gpg: Signature made Wed 16 Jun 2021 14:34:49 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210616: (25 commits) include/qemu/int128.h: Add function to create Int128 from int64_t bitops.h: Provide hswap32(), hswap64(), wswap64() swapping operations target/arm: Move expand_pred_b() data to vec_helper.c target/arm: Add framework for MVE decode target/arm: Implement MVE LETP insn target/arm: Implement MVE DLSTP target/arm: Implement MVE WLSTP insn target/arm: Implement MVE LCTP target/arm: Let vfp_access_check() handle late NOCP checks target/arm: Add handling for PSR.ECI/ICI target/arm: Handle VPR semantics in existing code target/arm: Enable FPSCR.QC bit for MVE target/arm: Provide and use H8 and H1_8 macros hw/arm: quanta-q71l add pca954x muxes hw/arm: gsj add pca9548 hw/arm: gsj add i2c comments target/arm: Fix mte page crossing test hw/intc/armv7m_nvic: Remove stale comment hw/arm: quanta-gbs-bmc add i2c comments hw/arm: add quanta-gbs-bmc machine ... Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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