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  1. Sep 26, 2022
  2. Sep 23, 2022
  3. Sep 22, 2022
    • Stefan Hajnoczi's avatar
      Merge tag 'edgar/xilinx-next-2022-09-21.for-upstream' of... · 6160d8ff
      Stefan Hajnoczi authored
      Merge tag 'edgar/xilinx-next-2022-09-21.for-upstream' of https://github.com/edgarigl/qemu into staging
      
      Xilinx queue
      
      # -----BEGIN PGP SIGNATURE-----
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      # =GZsl
      # -----END PGP SIGNATURE-----
      # gpg: Signature made Wed 21 Sep 2022 15:45:40 EDT
      # gpg:                using RSA key AC44FEDC14F7F1EBEDBF415129C596780F6BCA83
      # gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>" [unknown]
      # gpg:                 aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>" [unknown]
      # gpg: WARNING: This key is not certified with a trusted signature!
      # gpg:          There is no indication that the signature belongs to the owner.
      # Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF  4151 29C5 9678 0F6B CA83
      
      * tag 'edgar/xilinx-next-2022-09-21.for-upstream' of https://github.com/edgarigl/qemu
      
      :
        hw/microblaze: pass random seed to fdt
      
      Signed-off-by: default avatarStefan Hajnoczi <stefanha@redhat.com>
      6160d8ff
    • Stefan Hajnoczi's avatar
      Merge tag 'pull-hex-20220919' of https://github.com/quic/qemu into staging · 394876e0
      Stefan Hajnoczi authored
      Hexagon update
          remove unused encodings
          add fmin/fmax tests for signed zero
      
      # -----BEGIN PGP SIGNATURE-----
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      # -----END PGP SIGNATURE-----
      # gpg: Signature made Mon 19 Sep 2022 14:57:54 EDT
      # gpg:                using RSA key 3635C788CE62B91FD4C59AB47B0244FB12DE4422
      # gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [unknown]
      # gpg: WARNING: This key is not certified with a trusted signature!
      # gpg:          There is no indication that the signature belongs to the owner.
      # Primary key fingerprint: 3635 C788 CE62 B91F D4C5  9AB4 7B02 44FB 12DE 4422
      
      * tag 'pull-hex-20220919' of https://github.com/quic/qemu
      
      :
        Hexagon (tests/tcg/hexagon): add fmin/fmax tests for signed zero
        Hexagon (target/hexagon) remove unused encodings
      
      Signed-off-by: default avatarStefan Hajnoczi <stefanha@redhat.com>
      394876e0
  4. Sep 21, 2022
    • Jason A. Donenfeld's avatar
      hw/microblaze: pass random seed to fdt · b91b6b5a
      Jason A. Donenfeld authored
      
      If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
      initialize early. Set this using the usual guest random number
      generation function. This FDT node is part of the DT specification.
      
      Reviewed-by: default avatarEdgar E. Iglesias <edgar.iglesias@gmail.com>
      Signed-off-by: default avatarJason A. Donenfeld <Jason@zx2c4.com>
      Signed-off-by: default avatarEdgar E. Iglesias <edgar.iglesias@amd.com>
      b91b6b5a
    • Stefan Hajnoczi's avatar
      Merge tag 'm68k-for-7.2-pull-request' of https://github.com/vivier/qemu-m68k into staging · 6338c301
      Stefan Hajnoczi authored
      m68k pull request 20220921
      
      - several fixes for SR
      - implement TAS
      - feature cleanup
      
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      # WEiu8vcUMYEp
      # =IAMt
      # -----END PGP SIGNATURE-----
      # gpg: Signature made Wed 21 Sep 2022 11:51:57 EDT
      # gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
      # gpg:                issuer "laurent@vivier.eu"
      # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
      # gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
      # gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
      # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C
      
      * tag 'm68k-for-7.2-pull-request' of https://github.com/vivier/qemu-m68k
      
      :
        target/m68k: always call gen_exit_tb() after writes to SR
        target/m68k: rename M68K_FEATURE_M68000 to M68K_FEATURE_M68K
        target/m68k: Perform writback before modifying SR
        target/m68k: Fix MACSR to CCR
        target/m68k: Implement atomic test-and-set
      
      Signed-off-by: default avatarStefan Hajnoczi <stefanha@redhat.com>
      6338c301
    • Stefan Hajnoczi's avatar
      Merge tag 'pull-ppc-20220920' of https://gitlab.com/danielhb/qemu into staging · 6514f1a5
      Stefan Hajnoczi authored
      ppc patch queue for 2022-09-20:
      
      This queue contains a implementation of PowerISA 3.1B hash insns, ppc
      TCG insns cleanups and fixes, and miscellaneus fixes in the spapr and
      pnv_phb models.
      
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      # -----END PGP SIGNATURE-----
      # gpg: Signature made Tue 20 Sep 2022 15:37:56 EDT
      # gpg:                using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164
      # gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown]
      # gpg: WARNING: This key is not certified with a trusted signature!
      # gpg:          There is no indication that the signature belongs to the owner.
      # Primary key fingerprint: 17EB FF99 23D0 1800 AF28  3819 3CD9 CA96 DE03 3164
      
      * tag 'pull-ppc-20220920' of https://gitlab.com/danielhb/qemu
      
      :
        hw/ppc/spapr: Fix code style problems reported by checkpatch
        hw/pci-host: pnv_phb{3, 4}: Fix heap out-of-bound access failure
        hw/ppc: spapr: Use qemu_vfree() to free spapr->htab
        target/ppc: Clear fpstatus flags on helpers missing it
        target/ppc: Zero second doubleword of VSR registers for FPR insns
        target/ppc: Set OV32 when OV is set
        target/ppc: Zero second doubleword for VSX madd instructions
        target/ppc: Set result to QNaN for DENBCD when VXCVI occurs
        target/ppc: Zero second doubleword in DFP instructions
        target/ppc: Remove unused xer_* macros
        target/ppc: Remove extra space from s128 field in ppc_vsr_t
        target/ppc: Merge fsqrt and fsqrts helpers
        target/ppc: Move fsqrts to decodetree
        target/ppc: Move fsqrt to decodetree
        target/ppc: Implement hashstp and hashchkp
        target/ppc: Implement hashst and hashchk
        target/ppc: Add HASHKEYR and HASHPKEYR SPRs
      
      Signed-off-by: default avatarStefan Hajnoczi <stefanha@redhat.com>
      6514f1a5
    • Stefan Hajnoczi's avatar
      Merge tag 'pull-testing-next-200922-2' of https://github.com/stsquad/qemu into staging · 8f3aeb01
      Stefan Hajnoczi authored
      Testing and CI changes:
      
        - reduce number of targets for cross_user_build
        - update avocado xlnx_versal test with new binaries
        - add explicit timeouts to a number of avocado TCG tests
        - reduce default timeout to 120s
        - update lcitool to support cross-amd64
        - flatten a number of docker cross containers
        - clean up stale qemu/debian10 dependencies
        - remove obsolete Fedora VM test
        - add configure workaround for meson --disable-pie bug
        - disable --static-pie for aarch64 gitlab runner
        - update aarch32/aarch64 jobs to 22.04
        - deprecate 32 bit big-endian MIPS as a host
        - remove FROM qemu/ support from docker.py
        - remove Debian base images now everything is flat
      
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      # -----END PGP SIGNATURE-----
      # gpg: Signature made Tue 20 Sep 2022 12:57:51 EDT
      # gpg:                using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
      # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [unknown]
      # gpg: WARNING: This key is not certified with a trusted signature!
      # gpg:          There is no indication that the signature belongs to the owner.
      # Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44
      
      * tag 'pull-testing-next-200922-2' of https://github.com/stsquad/qemu
      
      : (30 commits)
        tests/docker: remove the Debian base images
        tests/docker: remove FROM qemu/ support from docker.py
        tests/docker: update and flatten debian-toolchain
        tests/docker: update and flatten debian-hexagon-cross
        tests/docker: update and flatten debian-loongarch-cross
        tests/docker: update and flatten debian-amd64-cross
        tests/lcitool: bump to latest version
        tests/docker: update and flatten debian-all-test-cross
        tests/docker: flatten debian-riscv64-test-cross
        Deprecate 32 bit big-endian MIPS
        gitlab-ci: update aarch32/aarch64 custom runner jobs
        gitlab-ci/custom-runners: Disable -static-pie for ubuntu-20.04-aarch64
        configure: explicitly set cflags for --disable-pie
        tests/vm: Remove obsolete Fedora VM test
        tests/docker: remove amd64 qemu/debian10 dependency
        tests/docker: remove tricore qemu/debian10 dependency
        tests/docker: flatten debian-powerpc-test-cross
        tests/docker: update and flatten debian-sparc64-cross
        tests/docker: update and flatten debian-sh4-cross
        tests/docker: update and flatten debian-mips64-cross
        ...
      
      Signed-off-by: default avatarStefan Hajnoczi <stefanha@redhat.com>
      8f3aeb01
    • Mark Cave-Ayland's avatar
      target/m68k: always call gen_exit_tb() after writes to SR · c7546abf
      Mark Cave-Ayland authored
      
      Any write to SR can change the security state so always call gen_exit_tb() when
      this occurs. In particular MacOS makes use of andiw/oriw in a few places to
      handle the switch between user and supervisor mode.
      
      Signed-off-by: default avatarMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
      Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Reviewed-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
      Message-Id: <20220917112515.83905-5-mark.cave-ayland@ilande.co.uk>
      Signed-off-by: default avatarLaurent Vivier <laurent@vivier.eu>
      c7546abf
    • Mark Cave-Ayland's avatar
      target/m68k: rename M68K_FEATURE_M68000 to M68K_FEATURE_M68K · aece90d8
      Mark Cave-Ayland authored
      
      The M68K_FEATURE_M68000 feature is misleading in that its name suggests the feature
      is defined just for Motorola 68000 CPUs, whilst in fact it is defined for all
      Motorola 680X0 CPUs.
      
      In order to avoid confusion with the other M68K_FEATURE_M680X0 constants which
      define the features available for specific Motorola CPU models, rename
      M68K_FEATURE_M68000 to M68K_FEATURE_M68K and add comments to clarify its usage.
      
      Signed-off-by: default avatarMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
      Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Reviewed-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
      Message-Id: <20220917112515.83905-2-mark.cave-ayland@ilande.co.uk>
      Signed-off-by: default avatarLaurent Vivier <laurent@vivier.eu>
      aece90d8
    • Richard Henderson's avatar
      target/m68k: Perform writback before modifying SR · 214c6002
      Richard Henderson authored
      Writes to SR may change security state, which may involve
      a swap of %ssp with %usp as reflected in %a7.  Finish the
      writeback of %sp@+ before swapping stack pointers.
      
      Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1206
      
      
      Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Reviewed-by: default avatarLaurent Vivier <laurent@vivier.eu>
      Reviewed-by: default avatarMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
      Message-Id: <20220913142818.7802-3-richard.henderson@linaro.org>
      Signed-off-by: default avatarLaurent Vivier <laurent@vivier.eu>
      214c6002
    • Richard Henderson's avatar
      target/m68k: Fix MACSR to CCR · 24ec52f9
      Richard Henderson authored
      
      First, we were writing to the entire SR register, instead
      of only the flags portion.  Second, we were not clearing C
      as per the documentation (X was cleared via the 0xf mask).
      
      Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Reviewed-by: default avatarLaurent Vivier <laurent@vivier.eu>
      Message-Id: <20220913142818.7802-2-richard.henderson@linaro.org>
      Signed-off-by: default avatarLaurent Vivier <laurent@vivier.eu>
      24ec52f9
    • Richard Henderson's avatar
      target/m68k: Implement atomic test-and-set · 5934dae7
      Richard Henderson authored
      
      This is slightly more complicated than cas,
      because tas is allowed on data registers.
      
      Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
      Reviewed-by: default avatarLaurent Vivier <laurent@vivier.eu>
      Message-Id: <20220829051746.227094-1-richard.henderson@linaro.org>
      Signed-off-by: default avatarLaurent Vivier <laurent@vivier.eu>
      5934dae7
  5. Sep 20, 2022
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