- Jan 27, 2012
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Anthony Liguori authored
Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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Anthony Liguori authored
Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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Anthony Liguori authored
Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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Anthony Liguori authored
This converts two devices at once because PIC subclasses ISA and converting subclasses independently is extremely hard. Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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Anthony Liguori authored
These are various small stylistic changes which help make things more consistent such that the automated conversion script can be simpler. It's not necessary to agree or disagree with these style changes because all of this code is going to be rewritten by the patch monkey script anyway. Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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Anthony Liguori authored
Since we are still dynamically creating TypeInfo, we need to chain the class_init function in order to be able to make use of it within subclasses of TYPE_DEVICE. This will disappear once we register TypeInfos directly. Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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Anthony Liguori authored
In order to introduce inheritance while still using the qdev registration interfaces, we need to be able to use a parent other than TYPE_DEVICE. Add a new interface that allows this. Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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Anthony Liguori authored
Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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Anthony Liguori authored
We already have a QOM interface for this so let's use it. Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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Anthony Liguori authored
Right now, DeviceInfo acts as the class for qdev. In order to switch to a proper ObjectClass derivative, we need to ween all of the callers off of interacting directly with the info pointer. Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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Anthony Liguori authored
This is a very shallow integration. We register a TYPE_DEVICE but only use QOM as basically a memory allocator. This will make all devices show up as QOM objects but they will all carry the TYPE_DEVICE. Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com> --- v1 -> v2 - update for new location of object.h
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Anthony Liguori authored
Because now all PCI devices are converted to qdev. Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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Anthony Liguori authored
bus is always NULL so the code in this if clause is dead (and therefore untested). Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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Anthony Liguori authored
This is a "shallow", half hearted, and untested conversion. Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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Jan Kiszka authored
A device reset does not affect the link state, only set_link does. Signed-off-by:
Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by:
Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
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Jan Kiszka authored
A device reset does not affect the link state, only set_link does. Signed-off-by:
Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by:
Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
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Jan Kiszka authored
By using strncasecmp, we allow for arbitrary characters after the "on"/"off" string. Fix this by switching to strcasecmp. Reviewed-by:
Andreas Färber <afaerber@suse.de> Reviewed-by:
Markus Armbruster <armbru@redhat.com> Signed-off-by:
Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by:
Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
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- Jan 26, 2012
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Thomas Higdon authored
Limit the return value (corresponding to the length of the buffer to be DMAed back to the intiator) to the value in req->cmd.xfer, which is the amount of data that the initiator expects. Eliminate now-duplicate code that does this guarding in the functions for individual commands. Without this, the SCRIPTS code in the emulated LSI device eventually raises a DMA interrupt for a data overrun when an INQUIRY command whose buflen exceeds req->cmd.xfer is processed. It's the responsibility of the client to provide a request buffer and allocation length that are large enough for the result of the command. Signed-off-by:
Thomas Higdon <thigdon@akamai.com> Reviewed-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Kevin Wolf <kwolf@redhat.com>
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Stefan Hajnoczi authored
There already exists a virtio_blk_handle_write trace event as well as completion events. Add the virtio_blk_handle_read event so it's easy to trace virtio-blk requests for both read and write operations. Signed-off-by:
Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by:
Kevin Wolf <kwolf@redhat.com>
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Rob Herring authored
Adds support for Calxeda's Highbank SoC. Signed-off-by:
Rob Herring <rob.herring@calxeda.com> Signed-off-by:
Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Peter Maydell authored
Support passing a board ID value to the kernel in r1 that is more than 16 bits wide. This is needed to pass the '-1 == invalid' value for boards which only support device tree booting. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Tested-by:
Mark Langsdorf <mark.langsdorf@calxeda.com>
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Mark Langsdorf authored
Create two functions, write_secondary_boot() and secondary_cpu_reset_hook(), to allow platforms more control of how secondary CPUs are brought up. The new functions default to NULL and aren't called unless they are populated so there are no changes to existing platform models. Signed-off-by:
Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Rob Herring authored
Add support for ahci on sysbus. Signed-off-by:
Rob Herring <rob.herring@calxeda.com> Signed-off-by:
Mark Langsdorf <mark.langsdorf@calxeda.com> Reviewed-by:
Andreas Färber <afaerber@suse.de> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Rob Herring authored
This adds very basic support for the xgmac ethernet core. Missing things include: - statistics counters - WoL support - rx checksum offload - chained descriptors (only linear descriptor ring) - broadcast and multicast handling Signed-off-by:
Rob Herring <rob.herring@calxeda.com> Signed-off-by:
Mark Langsdorf <mark.langsdorf@calxeda.com> Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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- Jan 25, 2012
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Blue Swirl authored
Remove target dependencies and compile Cirrus VGA in hwlib. Address masking can be removed since memory API handles that now. Signed-off-by:
Blue Swirl <blauwirbel@gmail.com>
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Blue Swirl authored
Instead of each target knowing or guessing the guest page size, just pass the desired size of dirtied memory area. Signed-off-by:
Blue Swirl <blauwirbel@gmail.com>
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- Jan 23, 2012
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Anthony Liguori authored
Otherwise we can write beyond the buffer and corrupt memory. This is tracked as CVE-2012-0029. Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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- Jan 22, 2012
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Blue Swirl authored
Fix the name of the init function. Reviewed-by:
Andreas Färber <afaerber@suse.de> Signed-off-by:
Blue Swirl <blauwirbel@gmail.com>
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Blue Swirl authored
Reviewed-by:
Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by:
Blue Swirl <blauwirbel@gmail.com>
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Blue Swirl authored
Improve VGA selection logic, push check for device availabilty to vl.c. Create the devices at board level unconditionally. Remove now unused pci_try_create*() functions. Make PCI VGA devices optional. Reviewed-by:
Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by:
Blue Swirl <blauwirbel@gmail.com>
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- Jan 21, 2012
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Andreas Färber authored
Rename SysBus device from 'grackle' to 'grackle-pcihost' to resolve a name conflict. Also mark both devices as no_user. Signed-off-by:
Andreas Färber <afaerber@suse.de> Cc: Alexander Graf <agraf@suse.de> Cc: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by:
Alexander Graf <agraf@suse.de>
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Alexander Graf authored
We call pci_host_config_{read,write}_common() which perform PCI config accesses. However they don't do all limit checking the way we expect it to. So let's introduce a small wrapper around them, making them behave the way we would without touching generic code. This patch is based on a patch by David Gibson which put this logic into the generic code. Signed-off-by:
David Gibson <david@gibson.dropbear.id.au> Signed-off-by:
Alexander Graf <agraf@suse.de>
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Benjamin Herrenschmidt authored
Currently on the pseries machine the SLOF firmware is used normally, but we bypass it when -kernel is specified. Having these two different boot paths can cause some confusion. In particular at present we need to "probe" the (emulated) PCI bus and produce device tree nodes for the PCI devices in qemu, for the -kernel case. In the SLOF case, it takes the device tree from qemu adds some stuff to it then passes it on to the kernel. It's been decided that a better approach is to always boot through SLOF, even when using -kernel. WIth this approach we can leave PCI probing and device node creation to SLOF in all cases which removes a bunch of code in qemu, and avoids iterating the PCI devices from the machine specific init code which we're not supposed to do. This patch changes qemu to always boot through SLOF, and not to create PCI nodes. Simultaneously it updates the included version of SLOF (submodule and binary image) to one which supports (and requires) the new approach. The new SLOF version also includes a number of unrelated enhancements: support for booting from virtio-pci devices and e1000, greatly improved FCode support and many bugfixes. It also makes SLOF ready to be used even when specifying a kernel on the qemu command line. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au> Signed-off-by:
Alexander Graf <agraf@suse.de>
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David Gibson authored
The pseries machine expects a para-virtualized guest and so supplies RTAS functions (via a hypercall) for performing PCI config space access. Currently the implementation of these calls into pci_default_{read,write}_config(). However this would be incorrect for any PCI device which overrides the default config read/write functions. AFAICT there's only one such device today, but we should still get it right. In addition the pci_host_config_{read,write}_common() functions which do correctly do this dispatch, perform bounds checking on the config space address, lack of which currently leads to an exploitable bug. This patch corrects the problem. Signed-off-by:
David Gibson <david@gibson.dropbear.id.au> Signed-off-by:
Alexander Graf <agraf@suse.de>
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Benjamin Herrenschmidt authored
On the pseries machine (which expexts a paravirtualized guest), guest access to PCI config space is via host-provided RTAS functions. This patch extends these RTAS functions to permit access to PCI extended config space, as specified in PAPR. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au> Signed-off-by:
Alexander Graf <agraf@suse.de>
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David Gibson authored
Back when I made patches introducing dma_addr_t and various PCI DMA wrapper functions, I made a mistake. The bmdma_addr_{read,write} functions need to take target_phys_addr_t not dma_addr_t, since they are assigned to MemoryRegionOps callbacks. This patch corrects my error. Signed-off-by:
David Gibson <david@gibson.dropbear.id.au> Signed-off-by:
Alexander Graf <agraf@suse.de>
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Benjamin Herrenschmidt authored
load_image_targphys() gets passed a max size for the file, but doesn't enforce it at all. Add a check and return -1 (error) if the file is too big, without loading it. Fix the bracing style in the function while we're at it. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au> Signed-off-by:
Alexander Graf <agraf@suse.de>
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Alexander Graf authored
When accessing the device specific virtio config space, we memcpy the data into a variable in QEMU. At that point we're basically pulling host endianness into the game which is a really bad idea. So instead, let's use the target specific load/store helpers for memory pointers which fetch things in target endianness. The whole array is already populated in target endianness anyways (see virtio-blk). Signed-off-by:
Alexander Graf <agraf@suse.de> Reviewed-by:
Anthony Liguori <aliguori@us.ibm.com>
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Benjamin Herrenschmidt authored
The virtio config area in PIO space is a bit special. The initial header is little endian but the rest (device specific) is guest native endian. The PIO accessors for PCI on machines that don't have native IO ports assume that all PIO is little endian, which works fine for everything except the above. A complicated way to fix it would be to split the BAR into two memory regions with different endianess settings, but this isn't practical to do, besides, the PIO code doesn't honor region endianness anyway (I have a patch for that too but it isn't necessary at this stage). So I decided to go for the quick fix instead which consists of reverting the swap in virtio-pci in selected places, hoping that when we eventually do a "v2" of the virtio protocols, we sort that out once and for all using a fixed endian setting for everything. Signed-off-by:
Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by:
Alexander Graf <agraf@suse.de> [agraf: keep virtio in libhw and determine endianness through a helper function in exec.c] Reviewed-by:
Anthony Liguori <aliguori@us.ibm.com>
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Alexander Graf authored
Now that we have the SoC init function in the same file, let's integrate it with the board initialization. While at it, also make use of the newly qdev'ified PCI host controller. Signed-off-by:
Alexander Graf <agraf@suse.de>
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