- Jul 19, 2022
-
-
Xiaojuan Yang authored
Add LoongArch flatted device tree, adding cpu device node, firmware cfg node, pcie node into it, and create fdt rom memory region. Now fdt info is not full since only uefi bios uses fdt, linux kernel does not use fdt. Loongarch Linux kernel uses acpi table which is full in qemu virt machine. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Xiaojuan Yang <yangxiaojuan@loongson.cn> Message-Id: <20220712083206.4187715-7-yangxiaojuan@loongson.cn> [rth: Set TARGET_NEED_FDT, add fdt to meson.build] Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
-
- Jul 04, 2022
-
-
Song Gao authored
This patch adds loongarch64 linux-user default configs file. Signed-off-by:
Song Gao <gaosong@loongson.cn> Signed-off-by:
Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
WANG Xuerui <git@xen0n.name> Message-Id: <20220624031049.1716097-13-gaosong@loongson.cn> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
-
- Jun 27, 2022
-
-
Richard Henderson authored
In arm-compat-semi.c, we have more advanced treatment of guest file descriptors than we do in other implementations. Split out GuestFD and related functions to a new file so that they can be shared. Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
-
- Jun 06, 2022
-
-
Xiaojuan Yang authored
Signed-off-by:
Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by:
Song Gao <gaosong@loongson.cn> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-42-yangxiaojuan@loongson.cn> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
-
Xiaojuan Yang authored
Emulate a 3A5000 board use the new loongarch instruction. 3A5000 belongs to the Loongson3 series processors. The board consists of a 3A5000 cpu model and the virt bridge. The host 3A5000 board is really complicated and contains many functions.Now for the tcg softmmu mode only part functions are emulated. More detailed info you can see https://github.com/loongson/LoongArch-Documentation Signed-off-by:
Xiaojuan Yang <yangxiaojuan@loongson.cn> Signed-off-by:
Song Gao <gaosong@loongson.cn> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220606124333.2060567-31-yangxiaojuan@loongson.cn> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
-
- May 08, 2022
-
-
Mark Cave-Ayland authored
DINO refers to the GSC-PCI bridge device which will soon be handled separately, however the QEMU HPPA machine is actually based upon the HPPA B160L as indicated by the Linux kernel dmesg output when booted in qemu-system-hppa and the QEMU MAINTAINERS file. Update the machine configuration to use CONFIG_HPPA_B160L instead of CONFIG_DINO and also update the machine description accordingly. Signed-off-by:
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Acked-by:
Helge Deller <deller@gmx.de> Message-Id: <20220504092600.10048-13-mark.cave-ayland@ilande.co.uk> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
-
- Apr 26, 2022
-
-
Richard Henderson authored
Unaligned traps are optional, but required with an mmu. Turn them on always, because the fallback behaviour undefined. Enable alignment checks in the config file. Unwind the guest pc properly from do_unaligned_access. Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220421151735.31996-48-richard.henderson@linaro.org>
-
- Apr 06, 2022
-
-
Marc-André Lureau authored
Convert the TARGET_WORDS_BIGENDIAN macro, similarly to what was done with HOST_BIG_ENDIAN. The new TARGET_BIG_ENDIAN macro is either 0 or 1, and thus should always be defined to prevent misuse. Signed-off-by:
Marc-André Lureau <marcandre.lureau@redhat.com> Suggested-by:
Halil Pasic <pasic@linux.ibm.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220323155743.1585078-8-marcandre.lureau@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
- Feb 26, 2022
-
-
Stafford Horne authored
Using the device tree means that qemu can now directly tell the kernel what hardware is configured rather than use having to maintain and update a separate device tree file. This patch adds automatic device tree generation support for the OpenRISC simulator. A device tree is built up based on the state of the configure openrisc simulator. This is then dumped to memory and the load address is passed to the kernel in register r3. Signed-off-by:
Stafford Horne <shorne@gmail.com> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org>
-
- Feb 09, 2022
-
-
Thomas Huth authored
It's likely broken, and nobody cared for picking it up again during the deprecation phase, so let's remove this now. Since this is the last entry in deprecated_targets_list, remove the related code in the configure script, too. Signed-off-by:
Thomas Huth <thuth@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Acked-by:
Cédric Le Goater <clg@kaod.org> Acked-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20211215084958.185214-1-thuth@redhat.com> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20220112112722.3641051-32-alex.bennee@linaro.org>
-
- Jan 13, 2022
-
-
Philippe Mathieu-Daudé authored
There is no ISA bus part in the MMIO VGA device, so rename: * hw/display/vga-isa-mm.c -> hw/display/vga-mmio.c * CONFIG_VGA_ISA_MM -> CONFIG_VGA_MMIO * ISAVGAMMState -> VGAMmioState * isa_vga_mm_init() -> vga_mmio_init() Reviewed-by:
BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by:
Thomas Huth <thuth@redhat.com> Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20211206224528.563588-2-f4bug@amsat.org> Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com>
-
- Jan 08, 2022
-
-
Warner Losh authored
CC: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Warner Losh <imp@bsdimp.com> Acked-by:
Kyle Evans <kevans@FreeBSD.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org>
-
- Nov 02, 2021
-
-
Peter Maydell authored
Cortex-M CPUs with MVE should advertise this fact to gdb, using the org.gnu.gdb.arm.m-profile-mve XML feature, which defines the VPR register. Presence of this feature also tells gdb to create pseudo-registers Q0..Q7, so we do not need to tell gdb about them separately. Note that unless you have a very recent GDB that includes this fix: http://patches-tcwg.linaro.org/patch/58133/ gdb will mis-print the individual fields of the VPR register as zero (but showing the whole thing as hex, eg with "print /x $vpr" will give the correct value). Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20211101160814.5103-1-peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
-
Gerd Hoffmann authored
Allows edk2 detect virtio-mmio devices and pcie ecam. See comment in hw/i386/microvm-dt.c for more details. Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com> Reviewed-by:
Sergio Lopez <slp@redhat.com> Message-Id: <20211014193617.2475578-1-kraxel@redhat.com>
-
- Sep 30, 2021
-
-
Yang Zhong authored
Add new CONFIG_SGX for sgx support in the Qemu, and the Kconfig default enable sgx in the i386 platform. Signed-off-by:
Yang Zhong <yang.zhong@intel.com> Message-Id: <20210719112136.57018-32-yang.zhong@intel.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
Peter Maydell authored
Currently we send VFP XML which includes D0..D15 or D0..D31, plus FPSID, FPSCR and FPEXC. The upstream GDB tolerates this, but its definition of this XML feature does not include FPSID or FPEXC. In particular, for M-profile cores there are no FPSID or FPEXC registers, so advertising those is wrong. Move FPSID and FPEXC into their own bit of XML which we only send for A and R profile cores. This brings our definition of the XML org.gnu.gdb.arm.vfp feature into line with GDB's own (at least for non-Neon cores...) and means we don't claim to have FPSID and FPEXC on M-profile. (It seems unlikely to me that any gdbstub users really care about being able to look at FPEXC and FPSID; but we've supplied them to gdb for a decade and it's not hard to keep doing so.) Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-id: 20210921162901.17508-5-peter.maydell@linaro.org
-
Peter Maydell authored
The aarch64-linux QEMU usermode binaries can never run 32-bit code, so they do not need to include the GDB XML for it. (arm_cpu_register_gdb_regs_for_features() will not use these XML files if the CPU has ARM_FEATURE_AARCH64, so we will not advertise to gdb that we have them.) Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-id: 20210921162901.17508-2-peter.maydell@linaro.org
-
- Sep 04, 2021
-
-
Ani Sinha authored
Currently various acpi hotplug modules like cpu hotplug, memory hotplug, pci hotplug, nvdimm hotplug are all pulled in when CONFIG_ACPI_X86 is turned on. This brings in support for whole lot of subsystems that some targets like mips does not need. They are added just to satisfy symbol dependencies. This is ugly and should be avoided. Targets should be able to pull in just what they need and no more. For example, mips only needs support for PIIX4 and does not need acpi pci hotplug support or cpu hotplug support or memory hotplug support etc. This change is an effort to clean this up. In this change, new config variables are added for various acpi hotplug subsystems. Targets like mips can only enable PIIX4 support and not the rest of all the other modules which were being previously pulled in as a part of CONFIG_ACPI_X86. Function stubs make sure that symbols which piix4 needs but are not required by mips (for example, symbols specific to pci hotplug etc) are available to satisfy the dependencies. Currently, this change only addresses issues with mips malta targets. In future we might be able to clean up other targets which are similarly pulling in lot of unnecessary hotplug modules by enabling ACPI_X86. This change should also address issues such as the following: https://gitlab.com/qemu-project/qemu/-/issues/221 https://gitlab.com/qemu-project/qemu/-/issues/193 Signed-off-by:
Ani Sinha <ani@anisinha.ca> Message-Id: <20210812071409.492299-1-ani@anisinha.ca> Reviewed-by:
Michael S. Tsirkin <mst@redhat.com> Signed-off-by:
Michael S. Tsirkin <mst@redhat.com>
-
- Jul 20, 2021
-
-
Alex Bennée authored
Because commit f4063f9c ("meson: Introduce target-specific Kconfig") ended being merged after commit 582079c9 ("hw/tricore: Add testdevice for tests in tests/tcg/"), we inadvertently added a symbol clash causing the build not to include the testboard needed for check-tcg. Fixes: f4063f9c ("meson: Introduce target-specific Kconfig") Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210720114057.32053-2-alex.bennee@linaro.org> [PMD: Updated description mentioning commits merged] Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com>
-
Philippe Mathieu-Daudé authored
Commit 7abb479c ("PPC: E500: Add FSL I2C controller and integrate RTC with it") added a global dependency on the DS1338 model, instead of a machine one (via Kconfig). This gives trouble when building standalone machines not exposing I2C bus: The following clauses were found for DS1338 CONFIG_DS1338=y config DS1338 depends on I2C Fix by selecting the DS1338 symbol in the single machine requiring it, the E500. Fixes: 7abb479c ("PPC: E500: Add FSL I2C controller and integrate RTC with it") Acked-by:
Paolo Bonzini <pbonzini@redhat.com> Acked-by:
David Gibson <david@gibson.dropbear.id.au> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210513163858.3928976-9-philmd@redhat.com>
-
Philippe Mathieu-Daudé authored
Boston is built around a Xilinx FPGA, which includes a PCIe root port and an UART. An Intel EG20T PCH connects the I/O peripherals, but only the SATA bus is emulated. Reviewed-by:
Thomas Huth <thuth@redhat.com> Reviewed-by:
Paul Burton <pburton@wavecomp.com> Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190311005618.19007-6-philmd@redhat.com>
-
- Jul 09, 2021
-
-
Alex Bennée authored
While the default config works well enough it does end up enabling a lot of stuff. For more minimal builds we can select a different list of devices and let Kconfig work out what we want. For example: ../../configure --without-default-features \ --target-list=arm-softmmu,aarch64-softmmu \ --with-devices-aarch64=minimal will override the aarch64-softmmu default set of devices with a more minimal set of devices that just enables the virt and sbsa-ref models. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210707131744.26027-6-alex.bennee@linaro.org> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-
Alex Bennée authored
In preparation for offering variation to our build configurations lets move everything and rename it to default. Common included base configs are also renamed. During the cleanup the stale usb.mak and pci.mak references were removed from MAINTAINERS. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210707131744.26027-5-alex.bennee@linaro.org> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
-