- Nov 07, 2023
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
These registers have a different format for pa2.0. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Handle pa2.0 logic for filling in ISR+IOR. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Fill in the insn_start value during form_gva, and copy it out to the env field in hppa_restore_state_to_opc. The value is not yet consumed. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Helge Deller authored
Signed-off-by:
Helge Deller <deller@gmx.de> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Helge Deller authored
The previous decoding misnamed the bit it called "local". Other than the name, the implementation was correct for pa1.x. Rename this field to "tlbe". PA2.0 adds (a real) local bit to PxTLB, and also adds a range of pages to flush in GR[b]. Signed-off-by:
Helge Deller <deller@gmx.de> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
These are aliased onto the normal integer loads to %g0. Since we don't emulate caches, prefetch is a nop. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Reduce the number of times we look for the constant 0. Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Helge Deller authored
The default PSW is set by the operating system with the PDC_PSW firmware call. Use that setting to decide if wide mode is to be enabled for interruptions and EIRR usage. Signed-off-by:
Helge Deller <deller@gmx.de> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Split out the tlb to a subsection so that it can be separately versioned -- the format is only partially following the architecture and is partially guided by the qemu implementation. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
The conversions to/from i64 can be eliminated entirely, folding computation into adjacent operations. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Remove all but those intended to change type to or from i64. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Rely only on TARGET_LONG_BITS, fixed at 64, and hppa_is_pa20. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Rename the existing insert tlb helpers to emphasize that they are for pa1.1 cpus. Implement a combined i/d tlb for pa2.0. Still missing is the new 'P' tlb bit. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Manipulate the shift count so that the bit to be tested is always placed at the MSB. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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