- May 19, 2016
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Paolo Bonzini authored
exec-all.h contains TCG-specific definitions. It is not needed outside TCG-specific files such as translate.c, exec.c or *helper.c. One generic function had snuck into include/exec/exec-all.h; move it to include/qom/cpu.h. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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- May 13, 2016
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Emilio G. Cota authored
We are inconsistent with the type of tb->flags: usage varies loosely between int and uint64_t. Settle to uint32_t everywhere, which is superior to both: at least one target (aarch64) uses the most significant bit in the u32, and uint64_t is wasteful. Compile-tested for all targets. Suggested-by:
Laurent Desnogues <laurent.desnogues@gmail.com> Suggested-by:
Richard Henderson <rth@twiddle.net> Tested-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by:
Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by:
Emilio G. Cota <cota@braap.org> Signed-off-by:
Richard Henderson <rth@twiddle.net> Message-Id: <1460049562-23517-1-git-send-email-cota@braap.org>
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- Mar 22, 2016
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Markus Armbruster authored
Commit 57cb38b3 included qapi/error.h into qemu/osdep.h to get the Error typedef. Since then, we've moved to include qemu/osdep.h everywhere. Its file comment explains: "To avoid getting into possible circular include dependencies, this file should not include any other QEMU headers, with the exceptions of config-host.h, compiler.h, os-posix.h and os-win32.h, all of which are doing a similar job to this file and are under similar constraints." qapi/error.h doesn't do a similar job, and it doesn't adhere to similar constraints: it includes qapi-types.h. That's in excess of 100KiB of crap most .c files don't actually need. Add the typedef to qemu/typedefs.h, and include that instead of qapi/error.h. Include qapi/error.h in .c files that need it and don't get it now. Include qapi-types.h in qom/object.h for uint16List. Update scripts/clean-includes accordingly. Update it further to match reality: replace config.h by config-target.h, add sysemu/os-posix.h, sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h comment quoted above similarly. This reduces the number of objects depending on qapi/error.h from "all of them" to less than a third. Unfortunately, the number depending on qapi-types.h shrinks only a little. More work is needed for that one. Signed-off-by:
Markus Armbruster <armbru@redhat.com> [Fix compilation without the spice devel packages. - Paolo] Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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- Mar 01, 2016
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Lluís Vilanova authored
Adds the 'TCGv_env' type for pointers to 'CPUArchState' objects. The tracing infrastructure later needs to differentiate between regular pointers and pointers to vCPUs. Also changes all targets to use the new 'TCGv_env' type instead of the generic 'TCGv_ptr'. As of now, the change is merely cosmetic ('TCGv_env' translates into 'TCGv_ptr'), but that could change in the future to enforce the difference. Note that a 'TCGv_env' type (for 'CPUState') is not added, since all helpers currently receive the architecture-specific pointer ('CPUArchState'). Signed-off-by:
Lluís Vilanova <vilanova@ac.upc.edu> Acked-by:
Richard Henderson <rth@twiddle.net> Message-id: 145641859552.30295.7821536833590725201.stgit@localhost Signed-off-by:
Stefan Hajnoczi <stefanha@redhat.com>
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- Feb 23, 2016
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Peter Maydell authored
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Eric Blake <eblake@redhat.com>
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- Feb 08, 2016
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Richard Henderson authored
Thus, use cpu_env as the parameter, not TCG_AREG0 directly. Update all uses in the translators. Reviewed-by:
Aurelien Jarno <aurelien@aurel32.net> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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- Feb 03, 2016
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Paolo Bonzini authored
Split the bits that require it to exec/log.h. Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Denis V. Lunev <den@openvz.org> Acked-by:
Christian Borntraeger <borntraeger@de.ibm.com> Message-id: 1452174932-28657-8-git-send-email-den@openvz.org Signed-off-by:
Stefan Hajnoczi <stefanha@redhat.com>
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- Jan 29, 2016
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Peter Maydell authored
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Message-id: 1453832250-766-35-git-send-email-peter.maydell@linaro.org
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- Oct 22, 2015
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Chen Gang authored
Originally, tilegx qemu only implement prefetch instructions in pipe x1, did not implement them in pipe y2. Signed-off-by:
Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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- Oct 09, 2015
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Markus Armbruster authored
Several devices don't survive object_unref(object_new(T)): they crash or hang during cleanup, or they leave dangling pointers behind. This breaks at least device-list-properties, because qmp_device_list_properties() needs to create a device to find its properties. Broken in commit f4eb32b5 "qmp: show QOM properties in device-list-properties", v2.1. Example reproducer: $ qemu-system-aarch64 -nodefaults -display none -machine none -S -qmp stdio {"QMP": {"version": {"qemu": {"micro": 50, "minor": 4, "major": 2}, "package": ""}, "capabilities": []}} { "execute": "qmp_capabilities" } {"return": {}} { "execute": "device-list-properties", "arguments": { "typename": "pxa2xx-pcmcia" } } qemu-system-aarch64: /home/armbru/work/qemu/memory.c:1307: memory_region_finalize: Assertion `((&mr->subregions)->tqh_first == ((void *)0))' failed. Aborted (core dumped) [Exit 134 (SIGABRT)] Unfortunately, I can't fix the problems in these devices right now. Instead, add DeviceClass member cannot_destroy_with_object_finalize_yet to mark them: * Hang during cleanup (didn't debug, so I can't say why): "realview_pci", "versatile_pci". * Dangling pointer in cpus: most CPUs, plus "allwinner-a10", "digic", "fsl,imx25", "fsl,imx31", "xlnx,zynqmp", because they create such CPUs * Assert kvm_enabled(): "host-x86_64-cpu", host-i386-cpu", "host-powerpc64-cpu", "host-embedded-powerpc-cpu", "host-powerpc-cpu" (the powerpc ones can't currently reach the assertion, because the CPUs are only registered when KVM is enabled, but the assertion is arguably in the wrong place all the same) Make qmp_device_list_properties() fail cleanly when the device is so marked. This improves device-list-properties from "crashes, hangs or leaves dangling pointers behind" to "fails". Not a complete fix, just a better-than-nothing work-around. In the above reproducer, device-list-properties now fails with "Can't list properties of device 'pxa2xx-pcmcia'". This also protects -device FOO,help, which uses the same machinery since commit ef523587 "qdev-monitor: include QOM properties in -device FOO, help output", v2.2. Example reproducer: $ qemu-system-aarch64 -machine none -device pxa2xx-pcmcia,help Before: qemu-system-aarch64: .../memory.c:1307: memory_region_finalize: Assertion `((&mr->subregions)->tqh_first == ((void *)0))' failed. After: Can't list properties of device 'pxa2xx-pcmcia' Cc: "Andreas Färber" <afaerber@suse.de> Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com> Cc: Alexander Graf <agraf@suse.de> Cc: Anthony Green <green@moxielogic.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Cc: Jia Liu <proljc@gmail.com> Cc: Leon Alrae <leon.alrae@imgtec.com> Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Cc: Max Filippov <jcmvbkbc@gmail.com> Cc: Michael Walle <michael@walle.cc> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: Richard Henderson <rth@twiddle.net> Cc: qemu-ppc@nongnu.org Cc: qemu-stable@nongnu.org Signed-off-by:
Markus Armbruster <armbru@redhat.com> Reviewed-by:
Eduardo Habkost <ehabkost@redhat.com> Message-Id: <1443689999-12182-10-git-send-email-armbru@redhat.com>
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- Oct 07, 2015
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Richard Henderson authored
It is no longer used, so tidy up everything reached by it. This includes the gen_opc_* arrays, the search_pc parameter and the inline gen_intermediate_code_internal functions. Reviewed-by:
Aurelien Jarno <aurelien@aurel32.net> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
The gen_opc_* arrays are already redundant with the data stored in the insn_start arguments. Transition restore_state_to_opc to use data from the latter. Reviewed-by:
Aurelien Jarno <aurelien@aurel32.net> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
Adjust all translators to respect it. Reviewed-by:
Aurelien Jarno <aurelien@aurel32.net> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
This symbol no longer exists. Reviewed-by:
Aurelien Jarno <aurelien@aurel32.net> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
This does tidy the icount test common to all targets. Reviewed-by:
Aurelien Jarno <aurelien@aurel32.net> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
While we're at it, emit the opcode adjacent to where we currently record data for search_pc. This puts gen_io_start et al on the "correct" side of the marker. Reviewed-by:
Aurelien Jarno <aurelien@aurel32.net> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
With an eye toward making it mandatory. Reviewed-by:
Aurelien Jarno <aurelien@aurel32.net> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Chen Gang authored
EX_CONTEXT_0_0 is used for jumping address, and EX_CONTEXT_0_1 is for INTERRUPT_CRITICAL_SECTION, which should only be 0 or 1 in user mode, or it will cause target SIGILL (and the patch doesn't support system mode). Signed-off-by:
Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Chen Gang authored
For some cases, they are for TILEGX_EXCP_OPCODE_UNKNOWN, not for TILEGX_EXCP_OPCODE_UNIMPLEMENTED. Also for some cases, they are for TILEGX_EXCP_OPCODE_UNIMPLEMENTED, not for TILEGX_EXCP_OPCODE_UNKNOWN. When analyzing issues, the correct printing information is necessary, e.g. grep UIMP in gcc testsuite output log for finding qemu tilegx umimplementation issues, grep UNKNOWN for finding unknown instructions. Signed-off-by:
Chen Gang <gang.chen.5i5j@gmail.com> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Chen Gang authored
Signed-off-by:
Chen Gang <gang.chen.5i5j@gmail.com> Message-Id: <1443956491-26850-3-git-send-email-gang.chen.5i5j@gmail.com> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Chen Gang authored
Signed-off-by:
Chen Gang <gang.chen.5i5j@gmail.com> Message-Id: <1443956491-26850-2-git-send-email-gang.chen.5i5j@gmail.com> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Chen Gang authored
It is just according to v1sh* instructions implementation. Signed-off-by:
Chen Gang <gang.chen.5i5j@gmail.com> Message-Id: <1443956491-26850-1-git-send-email-gang.chen.5i5j@gmail.com> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
These are mapped onto some of the normal load instructions, when the destination is the zero register. Other load insns do fault even when targeting the zero register. Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Chen Gang authored
Signed-off-by:
Chen Gang <gang.chen.5i5j@gmail.com> Message-Id: <1443562720-3008-1-git-send-email-gang.chen.5i5j@gmail.com> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
Consolidate signal handling under a single exception. Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Chen Gang authored
Notice raise and bpt, decoding the constants embedded in the nop addil instruction in the x0 slot. [rth: Generalize TILEGX_EXCP_OPCODE_ILL to TILEGX_EXCP_SIGNAL. Drop validation of signal values.] Signed-off-by:
Chen Gang <gang.chen.5i5j@gmail.com> Message-Id: <1443243635-4886-1-git-send-email-gang.chen.5i5j@gmail.com> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Chen Gang authored
According to the related document, bpt can be only in x1 pipe. Signed-off-by:
Chen Gang <gang.chen.5i5j@gmail.com> Message-Id: <1443224574-2718-1-git-send-email-gang.chen.5i5j@gmail.com> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Chen Gang authored
Signed-off-by:
Chen Gang <gang.chen.5i5j@gmail.com> Reviewed-by:
Richard Henderson <rth@twiddle.net> Message-Id: <1442874414-3578-1-git-send-email-gang.chen.5i5j@gmail.com> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Chen Gang authored
[rth: Implement everything inline; handle v1addi and v2addi as well.] Signed-off-by:
Chen Gang <gang.chen.5i5j@gmail.com> Message-Id: <1442873918-3394-1-git-send-email-gang.chen.5i5j@gmail.com> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Chen Gang authored
v2sh* are implemented with helper functions; v4sh* are implmeneted with inline code. Signed-off-by:
Chen Gang <gang.chen.5i5j@gmail.com> Message-Id: <1442872055-2836-1-git-send-email-gang.chen.5i5j@gmail.com> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
Using the V1 macro when we want to replicate a byte across the 8 elements of the word. Using deposit and extract for manipulating specific elements. Signed-off-by:
Richard Henderson <rth@twiddle.net>
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- Sep 15, 2015
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Richard Henderson authored
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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Richard Henderson authored
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <rth@twiddle.net>
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