- Dec 19, 2020
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Markus Armbruster authored
The string output visitor should serialize numbers so that the string input visitor deserializes them back to the same number. It fails to do so. print_type_number() uses format %f. This is prone to nasty rounding errors. For instance, numbers between 0 and 0.0000005 get flushed to zero. We currently use this visitor only for HMP info migrate, info network, info qtree, and info memdev. No double values occur there as far as I can tell. Fix anyway by formatting with %.17g. 17 decimal digits always suffice for IEEE double. See also recent commit "qobject: Fix qnum_to_string() to use sufficient precision". Signed-off-by:
Markus Armbruster <armbru@redhat.com> Message-Id: <20201210161452.2813491-9-armbru@redhat.com>
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Markus Armbruster authored
This demonstrates rounding error due to insufficient precision: double 3.1415926535897932 gets converted to JSON 3.141593. Signed-off-by:
Markus Armbruster <armbru@redhat.com> Message-Id: <20201210161452.2813491-8-armbru@redhat.com>
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Markus Armbruster authored
We should serialize numbers to JSON so that they deserialize back to the same number. We fail to do so. The culprit is qnum_to_string(): it uses format %f with trailing '0' trimmed. Results in pretty output for "nice" numbers, but is prone to nasty rounding errors. For instance, numbers between 0 and 0.0000005 get flushed to zero. Where exactly the incorrect rounding can bite is tiresome to gauge. Here's my take. * In QMP output, type 'number': - query-blockstats value avg_rd_queue_depth - QMP query-migrate values mbps, cache-miss-rate, encoding-rate, busy-rate, compression-rate. Relatively harmless, I guess. * In tracing QMP input. Harmless. * In qemu-ga output, type 'number': guest-get-users value login-time. Harmless. * In output of HMP qom-get. Harmless. Not affected, because double values don't actually occur there (I think): * QMP output, type 'any': * qom-get value * qom-list, qom-list-properties value default-value * query-cpu-model-comparison, query-cpu-model-baseline, query-cpu-model-expansion value props. * qemu-img --output json output. * "json:" pseudo-filenames generated by bdrv_refresh_filename(). * The rbd block driver's "=keyvalue-pairs" hack. * In -object help on property default values. Aside: use of JSON feels inappropriate here. * Output of HMP qom-get. * Argument conversion to QemuOpts for qdev_device_add() and HMP with qemu_opts_from_qdict() QMP and HMP device_add, virtio-net failover primary creation, xen-usb "usb-host" creation, HMP netdev_add, object_add. * The uses of qobject_input_visitor_new_flat_confused() As far as I can tell, none of the visited types contain double values. * Dumping ImageInfoSpecific with dump_qobject() Fix by formatting with %.17g. 17 decimal digits always suffice for IEEE double. The change to expected test output illustrates the effect: the rounding errors are gone, but some seemingly "nice" numbers now get converted to not so nice strings, e.g. 0.42 to "0.41999999999999998". This is because 0.42 is not representable exactly in double. It's more accurate in this example than strictly necessary, though. If ugly accuracy bothers us, we can we can try using the least number of digits that still converts back to the same double. In this example, "0.42" would do. Signed-off-by:
Markus Armbruster <armbru@redhat.com> Message-Id: <20201210161452.2813491-7-armbru@redhat.com>
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Markus Armbruster authored
qnum_to_string() has a FIXME comment about rounding errors due to insufficient precision. Cover it: 2.718281828459045 gets converted to "2.718282". The next commit will fix it. Signed-off-by:
Markus Armbruster <armbru@redhat.com> Message-Id: <20201210161452.2813491-6-armbru@redhat.com>
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Markus Armbruster authored
Move one of large_number()'s three checks to uint_number(), and the other two to float_number(). Signed-off-by:
Markus Armbruster <armbru@redhat.com> Message-Id: <20201210161452.2813491-5-armbru@redhat.com>
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Markus Armbruster authored
Signed-off-by:
Markus Armbruster <armbru@redhat.com> Message-Id: <20201210161452.2813491-4-armbru@redhat.com>
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Markus Armbruster authored
simple_number() checks only qnum_get_try_int(). Also check qnum_get_try_uint() and qnum_get_double(). float_number() checks only qnum_get_double(). Also check qnum_get_try_int() and qnum_get_try_uint(). Signed-off-by:
Markus Armbruster <armbru@redhat.com> Message-Id: <20201210161452.2813491-3-armbru@redhat.com>
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Markus Armbruster authored
simple_number() and float_number() convert from JSON to QNumber and back. simple_number() tests "-0", but skips the conversion back to JSON, because it yields "0", not "-0". Works as intended, so better cover it: don't skip, but expect the funny result. float_number() tests "-32.20e-10", but skips the conversion back to JSON, because it yields "-0". This is a known bug in qnum_to_string(), marked FIXME there. Cover the bug: don't skip, but expect the funny result. While there, switch from g_assert() to g_assert_cmpstr() & friends for friendlier test failures. Signed-off-by:
Markus Armbruster <armbru@redhat.com> Message-Id: <20201210161452.2813491-2-armbru@redhat.com>
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Eric Blake authored
Anywhere we create a list of just one item or by prepending items (typically because order doesn't matter), we can use QAPI_LIST_PREPEND(). But places where we must keep the list in order by appending remain open-coded until later patches. Note that as a side effect, this also performs a cleanup of two minor issues in qga/commands-posix.c: the old code was performing new = g_malloc0(sizeof(*ret)); which 1) is confusing because you have to verify whether 'new' and 'ret' are variables with the same type, and 2) would conflict with C++ compilation (not an actual problem for this file, but makes copy-and-paste harder). Signed-off-by:
Eric Blake <eblake@redhat.com> Message-Id: <20201113011340.463563-5-eblake@redhat.com> Reviewed-by:
Markus Armbruster <armbru@redhat.com> Acked-by:
Stefan Hajnoczi <stefanha@redhat.com> [Straightforward conflicts due to commit a8aa94b5 "qga: update schema for guest-get-disks 'dependents' field" and commit a10b453a "target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c" resolved. Commit message tweaked.] Signed-off-by:
Markus Armbruster <armbru@redhat.com>
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Eric Blake authored
Instead of taking a list parameter and returning a new head at a distance, just return the new item for the caller to insert into a list via QAPI_LIST_PREPEND. Signed-off-by:
Eric Blake <eblake@redhat.com> Message-Id: <20201113011340.463563-4-eblake@redhat.com> Reviewed-by:
Markus Armbruster <armbru@redhat.com> Signed-off-by:
Markus Armbruster <armbru@redhat.com>
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Eric Blake authored
Instead of modifying the value member of a list element passed as a parameter, and open-coding the manipulation of that list, it's nicer to just return a freshly allocated value to be prepended to a list using QAPI_LIST_PREPEND. Signed-off-by:
Eric Blake <eblake@redhat.com> Message-Id: <20201113011340.463563-3-eblake@redhat.com> Reviewed-by:
Markus Armbruster <armbru@redhat.com> Signed-off-by:
Markus Armbruster <armbru@redhat.com>
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- Dec 18, 2020
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Peter Maydell authored
A collection of RISC-V improvements: - Improve the sifive_u DTB generation - Add QSPI NOR flash to Microchip PFSoC - Fix a bug in the Hypervisor HLVX/HLV/HSV instructions - Fix some mstatus mask defines - Ibex PLIC improvements - OpenTitan memory layout update - Initial steps towards support for 32-bit CPUs on 64-bit builds # gpg: Signature made Fri 18 Dec 2020 05:59:42 GMT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20201217-1: (23 commits) riscv/opentitan: Update the OpenTitan memory layout hw/riscv: Use the CPU to determine if 32-bit target/riscv: cpu: Set XLEN independently from target target/riscv: csr: Remove compile time XLEN checks target/riscv: cpu_helper: Remove compile time XLEN checks target/riscv: cpu: Remove compile time XLEN checks target/riscv: Specify the XLEN for CPUs target/riscv: Add a riscv_cpu_is_32bit() helper function target/riscv: fpu_helper: Match function defs in HELPER macros hw/riscv: sifive_u: Remove compile time XLEN checks hw/riscv: spike: Remove compile time XLEN checks hw/riscv: virt: Remove compile time XLEN checks hw/riscv: boot: Remove compile time XLEN checks riscv: virt: Remove target macro conditionals riscv: spike: Remove target macro conditionals target/riscv: Add a TYPE_RISCV_CPU_BASE CPU hw/riscv: Expand the is 32-bit check to support more CPUs intc/ibex_plic: Clear interrupts that occur during claim process target/riscv: Fix definition of MSTATUS_TW and MSTATUS_TSR target/riscv: Fix the bug of HLVX/HLV/HSV ... Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Alistair Francis authored
OpenTitan is currently only avalible on an FPGA platform and the memory addresses have changed. Update to use the new memory addresses. Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Message-id: 8eb65314830a75d0fea3fccf77bc45b8ddd01c42.1607982831.git.alistair.francis@wdc.com
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Alistair Francis authored
Instead of using string compares to determine if a RISC-V machine is using 32-bit or 64-bit CPUs we can use the initalised CPUs. This avoids us having to maintain a list of CPU names to compare against. This commit also fixes the name of the function to match the riscv_cpu_is_32bit() function. Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-id: 8ab7614e5df93ab5267788b73dcd75f9f5615e82.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 7eddba45b5d223321c031431849fdd42eceb514b.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Message-id: 7371180970b7db310d3a1da21d03d33499c2beb0.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Message-id: 872d2dfcd1c7c3914655d677e911b9432eb8f340.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Message-id: a426ead44db5065a0790066d43e91245683509d7.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: c1da66affbb83ec4a2fbeb0194293bd24d65f5dc.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: ebd37b237a8cbe457335b948bd57f487b6b31869.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Update the function definitions generated in helper.h to match the actual function implementations. Also remove all compile time XLEN checks when building. Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Message-id: 614c369cb0000d070873a647b8aac7e023cba145.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Message-id: 40d6df4dd05302c566e419be3a1fef7799e57c2e.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: ac75037dd58061486de421a0fcd9ac8a92014607.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: d7ca1aca672515e6a4aa0d41716238b055f3f25c.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 51e9842dbed1acceebad7f97bd3aae69aa1ac19e.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: aed1174c2efd2f050fa5bd8f524d68795b12c0e4.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 04ac7fba2348c92f296a5e6a9959ac72b77ae4c6.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 86e5ccd9eae2f5d8c2257679c6ccf6078a5d51af.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Currently the riscv_is_32_bit() function only supports the generic rv32 CPUs. Extend the function to support the SiFive and LowRISC CPUs as well. Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 9a13764115ba78688ba61b56526c6de65fc3ef42.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Previously if an interrupt occured during the claim process (after the interrupt is claimed but before it's completed) it would never be cleared. This patch ensures that we also clear the hidden_pending bits as well. Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Tested-by:
Jackie Ke <jackieke724@hotmail.com> Message-id: 4e9786084a86f220689123cc8a7837af8fa071cf.1607100423.git.alistair.francis@wdc.com
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Alex Richardson authored
The TW and TSR fields should be bits 21 and 22 and not 30/29. This was found while comparing QEMU behaviour against the sail formal model (https://github.com/rems-project/sail-riscv/ ). Signed-off-by:
Alex Richardson <Alexander.Richardson@cl.cam.ac.uk> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com> Message-id: 20201130170117.71281-1-Alexander.Richardson@cl.cam.ac.uk Signed-off-by:
Alistair Francis <alistair.francis@wdc.com>
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Yifei Jiang authored
We found that the hypervisor virtual-machine load and store instructions, included HLVX/HLV/HSV, couldn't access guest userspace memory. In the riscv-privileged spec, HLVX/HLV/HSV is defined as follow: "As usual when V=1, two-stage address translation is applied, and the HS-level sstatus.SUM is ignored." But get_physical_address() doesn't ignore sstatus.SUM, when HLVX/HLV/HSV accesses guest userspace memory. So this patch fixes it. Signed-off-by:
Yifei Jiang <jiangyifei@huawei.com> Signed-off-by:
Yipeng Yin <yinyipeng1@huawei.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com> Message-id: 20201130012810.899-1-jiangyifei@huawei.com Signed-off-by:
Alistair Francis <alistair.francis@wdc.com>
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Xinhao Zhang authored
Fix code style. Don't use '#' flag of printf format ('%#') in format strings, use '0x' prefix instead Signed-off-by:
Xinhao Zhang <zhangxinhao1@huawei.com> Signed-off-by:
Kai Deng <dengkai1@huawei.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com> Message-id: 20201116140148.2850128-1-zhangxinhao1@huawei.com Signed-off-by:
Alistair Francis <alistair.francis@wdc.com>
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Vitaly Wool authored
Add QSPI NOR flash definition for Microchip PolarFire SoC. Signed-off-by:
Vitaly Wool <vitaly.wool@konsulko.com> Acked-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Message-id: 20201112074950.33283-1-vitaly.wool@konsulko.com Signed-off-by:
Alistair Francis <alistair.francis@wdc.com>
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Anup Patel authored
The sifive_u machine emulates two UARTs but we have only UART0 DT node in the generated DTB so this patch adds UART1 DT node in the generated DTB. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com> Message-id: 20201111094725.3768755-1-anup.patel@wdc.com Signed-off-by:
Alistair Francis <alistair.francis@wdc.com>
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- Dec 17, 2020
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Peter Maydell authored
x86 queue, 2020-12-17 Features: * AVX512_FP16 feature (Cathy Zhang) Cleanups: * accel code cleanup (Claudio Fontana) * hyperv initialization cleanup (Vitaly Kuznetsov) # gpg: Signature made Thu 17 Dec 2020 18:44:45 GMT # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost-gl/tags/x86-next-pull-request: cpu: Remove unnecessary noop methods tcg: Make CPUClass.debug_excp_handler optional tcg: make CPUClass.cpu_exec_* optional tcg: cpu_exec_{enter,exit} helpers i386: tcg: remove inline from cpu_load_eflags i386: move TCG cpu class initialization to tcg/ x86/cpu: Add AVX512_FP16 cpu feature i386: move hyperv_limits initialization to x86_cpu_realizefn() i386: move hyperv_version_id initialization to x86_cpu_realizefn() i386: move hyperv_interface_id initialization to x86_cpu_realizefn() i386: move hyperv_vendor_id initialization to x86_cpu_realizefn() i386: move cpu dump out of helper.c into cpu-dump.c i386: move TCG accel files into tcg/ i386: hvf: remove stale MAINTAINERS entry for old hvf stubs i386: move hax accel files into hax/ i386: move whpx accel files into whpx/ i386: move kvm accel files into kvm/ Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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- Dec 16, 2020
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Eduardo Habkost authored
In the previous commits we made cpu_exec_* and debug_excp_handler optional, so we can now remove these no-op handlers. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Signed-off-by:
Claudio Fontana <cfontana@suse.de> Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20201212155530.23098-13-cfontana@suse.de> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost authored
Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Signed-off-by:
Claudio Fontana <cfontana@suse.de> Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20201212155530.23098-12-cfontana@suse.de> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost authored
This will let us simplify the code that initializes CPU class methods, when we move cpu_exec_*() to a separate struct. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Signed-off-by:
Claudio Fontana <cfontana@suse.de> Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20201212155530.23098-11-cfontana@suse.de> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost authored
Move invocation of CPUClass.cpu_exec_*() to separate helpers, to make it easier to refactor that code later. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Signed-off-by:
Claudio Fontana <cfontana@suse.de> Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20201212155530.23098-10-cfontana@suse.de> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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