- Mar 24, 2021
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Alex Bennée authored
It may be arm-compat-semihosting but more than one architecture uses it so lets move the tests into the multiarch area. We gate it on the feature and split the semicall.h header between the arches. Also clean-up a bit of the Makefile messing about to one common set of runners. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210323165308.15244-6-alex.bennee@linaro.org>
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Richard Henderson authored
In bbc17caf, we used an alias attribute to allow target_page to be declared const, and yet be initialized late. This fails when using LTO with several versions of gcc. The compiler looks through the alias and decides that the const variable is statically initialized to zero, then propagates that zero to many uses of the variable. This can be avoided by compiling one object file with -fno-lto. In this way, any initializer cannot be seen, and the constant propagation does not occur. Since we are certain to have this separate compilation unit, we can drop the alias attribute as well. We simply have differing declarations for target_page in different compilation units. Drop the use of init_target_page, and drop the configure detection for CONFIG_ATTRIBUTE_ALIAS. In order to change the compilation flags for a file with meson, we must use a static_library. This runs into specific_ss, where we would need to create many static_library instances. Fix this by splitting page-vary.c: the page-vary-common.c part is compiled once as a static_library, while the page-vary.c part is left in specific_ss in order to handle the target-specific value of TARGET_PAGE_BITS_MIN. Reported-by:
Gavin Shan <gshan@redhat.com> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210321211534.2101231-1-richard.henderson@linaro.org> [PMD: Fix typo in subject, split original patch in 3] Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by:
Gavin Shan <gshan@redhat.com> Message-Id: <20210322112427.4045204-4-f4bug@amsat.org> [rth: Update MAINTAINERS] Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
exec-vary.c is about variable page size handling, rename it page-vary.c. Currently this file is target specific (built once for each target), comment this. Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210322112427.4045204-2-f4bug@amsat.org> [rth: Update MAINTAINERS] Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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- Mar 22, 2021
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Philippe Mathieu-Daudé authored
We can't know the caller read enough data in the memory pointed by ext_hdr to cast it as a ip6_ext_hdr_routing. Declare rt_hdr on the stack and fill it again from the iovec. Since we already checked there is enough data in the iovec buffer, simply add an assert() call to consume the bytes_read variable. This fix a 2 bytes buffer overrun in eth_parse_ipv6_hdr() reported by QEMU fuzzer: $ cat << EOF | ./qemu-system-i386 -M pc-q35-5.0 \ -accel qtest -monitor none \ -serial none -nographic -qtest stdio outl 0xcf8 0x80001010 outl 0xcfc 0xe1020000 outl 0xcf8 0x80001004 outw 0xcfc 0x7 write 0x25 0x1 0x86 write 0x26 0x1 0xdd write 0x4f 0x1 0x2b write 0xe1020030 0x4 0x190002e1 write 0xe102003a 0x2 0x0807 write 0xe1020048 0x4 0x12077cdd write 0xe1020400 0x4 0xba077cdd write 0xe1020420 0x4 0x190002e1 write 0xe1020428 0x4 0x3509d807 write 0xe1020438 0x1 0xe2 EOF ================================================================= ==2859770==ERROR: AddressSanitizer: stack-buffer-overflow on address 0x7ffdef904902 at pc 0x561ceefa78de bp 0x7ffdef904820 sp 0x7ffdef904818 READ of size 1 at 0x7ffdef904902 thread T0 #0 0x561ceefa78dd in _eth_get_rss_ex_dst_addr net/eth.c:410:17 #1 0x561ceefa41fb in eth_parse_ipv6_hdr net/eth.c:532:17 #2 0x561cef7de639 in net_tx_pkt_parse_headers hw/net/net_tx_pkt.c:228:14 #3 0x561cef7dbef4 in net_tx_pkt_parse hw/net/net_tx_pkt.c:273:9 #4 0x561ceec29f22 in e1000e_process_tx_desc hw/net/e1000e_core.c:730:29 #5 0x561ceec28eac in e1000e_start_xmit hw/net/e1000e_core.c:927:9 #6 0x561ceec1baab in e1000e_set_tdt hw/net/e1000e_core.c:2444:9 #7 0x561ceebf300e in e1000e_core_write hw/net/e1000e_core.c:3256:9 #8 0x561cef3cd4cd in e1000e_mmio_write hw/net/e1000e.c:110:5 Address 0x7ffdef904902 is located in stack of thread T0 at offset 34 in frame #0 0x561ceefa320f in eth_parse_ipv6_hdr net/eth.c:486 This frame has 1 object(s): [32, 34) 'ext_hdr' (line 487) <== Memory access at offset 34 overflows this variable HINT: this may be a false positive if your program uses some custom stack unwind mechanism, swapcontext or vfork (longjmp and C++ exceptions *are* supported) SUMMARY: AddressSanitizer: stack-buffer-overflow net/eth.c:410:17 in _eth_get_rss_ex_dst_addr Shadow bytes around the buggy address: 0x10003df188d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x10003df188e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x10003df188f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x10003df18900: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x10003df18910: 00 00 00 00 00 00 00 00 00 00 00 00 f1 f1 f1 f1 =>0x10003df18920:[02]f3 f3 f3 00 00 00 00 00 00 00 00 00 00 00 00 0x10003df18930: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x10003df18940: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x10003df18950: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x10003df18960: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0x10003df18970: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Shadow byte legend (one shadow byte represents 8 application bytes): Addressable: 00 Partially addressable: 01 02 03 04 05 06 07 Stack left redzone: f1 Stack right redzone: f3 ==2859770==ABORTING Add the corresponding qtest case with the fuzzer reproducer. FWIW GCC 11 similarly reported: net/eth.c: In function 'eth_parse_ipv6_hdr': net/eth.c:410:15: error: array subscript 'struct ip6_ext_hdr_routing[0]' is partly outside array bounds of 'struct ip6_ext_hdr[1]' [-Werror=array-bounds] 410 | if ((rthdr->rtype == 2) && (rthdr->segleft == 1)) { | ~~~~~^~~~~~~ net/eth.c:485:24: note: while referencing 'ext_hdr' 485 | struct ip6_ext_hdr ext_hdr; | ^~~~~~~ net/eth.c:410:38: error: array subscript 'struct ip6_ext_hdr_routing[0]' is partly outside array bounds of 'struct ip6_ext_hdr[1]' [-Werror=array-bounds] 410 | if ((rthdr->rtype == 2) && (rthdr->segleft == 1)) { | ~~~~~^~~~~~~~~ net/eth.c:485:24: note: while referencing 'ext_hdr' 485 | struct ip6_ext_hdr ext_hdr; | ^~~~~~~ Cc: qemu-stable@nongnu.org Buglink: https://bugs.launchpad.net/qemu/+bug/1879531 Reported-by:
Alexander Bulekov <alxndr@bu.edu> Reported-by:
Miroslav Rezanina <mrezanin@redhat.com> Reviewed-by:
Stefano Garzarella <sgarzare@redhat.com> Reviewed-by:
Miroslav Rezanina <mrezanin@redhat.com> Fixes: eb700029 ("net_pkt: Extend packet abstraction as required by e1000e functionality") Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by:
Jason Wang <jasowang@redhat.com>
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- Mar 16, 2021
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Alexander Bulekov authored
For testing, it can be useful to simulate an enormous amount of memory (e.g. 2^64 RAM). This adds an MMIO device that acts as sparse memory. When something writes a nonzero value to a sparse-mem address, we allocate a block of memory. For now, since the only user of this device is the fuzzer, we do not track and free zeroed blocks. The device has a very low priority (so it can be mapped beneath actual RAM, and virtual device MMIO regions). Signed-off-by:
Alexander Bulekov <alxndr@bu.edu> Reviewed-by:
Darren Kenny <darren.kenny@oracle.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Philippe Mathieu-Daudé authored
When we started to commit the fuzzer QTest reproducers to fuzz-test.c in commit d8dd1095 ("qtest: add fuzz test case"), we forgot to add the corresponding MAINTAINERS entry. Do it now. Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by:
Thomas Huth <thuth@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Philippe Mathieu-Daudé authored
This test fails when QEMU is built without the virtio-scsi device, restrict it to its availability. Reviewed-by:
Michael S. Tsirkin <mst@redhat.com> Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by:
Thomas Huth <thuth@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Philippe Mathieu-Daudé authored
This test fails when QEMU is built without the megasas device, restrict it to its availability. Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by:
Thomas Huth <thuth@redhat.com> Signed-off-by:
Paolo Bonzini <pbonzini@redhat.com>
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Philippe Mathieu-Daudé authored
Signed-off-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210202155611.998424-1-philmd@redhat.com> Signed-off-by:
Alex Williamson <alex.williamson@redhat.com>
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- Mar 15, 2021
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Laurent Vivier authored
The machine is based on Goldfish interfaces defined by Google for Android simulator. It uses Goldfish-rtc (timer and RTC), Goldfish-pic (PIC) and Goldfish-tty (for serial port and early tty). The machine is created with 128 virtio-mmio bus, and they can be used to use serial console, GPU, disk, NIC, HID, ... Signed-off-by:
Laurent Vivier <laurent@vivier.eu> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Tested-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210312214145.2936082-6-laurent@vivier.eu>
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Philippe Mathieu-Daudé authored
Extract the VT82C686 PCI UHCI function into a new unit so it is only build when the VT82C686 south bridge is selected. Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210309190802.830969-4-f4bug@amsat.org> Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com>
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- Mar 12, 2021
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Thomas Huth authored
The status of the gitlab-CI files is currently somewhat confusing, and it is often not quite clear whether a patch should go via my tree or via the testing tree of Alex. That situation has grown historically... Initially, I was the only one using the gitlab-CI, just for my private repository there. But in the course of time, the gitlab-CI switched to use the containers from tests/docker/ (which is not part of the gitlab-CI section in the MAINTAINERS file), and QEMU now even switched to gitlab.com completely for the repository and will soon use it as its gating CI, too, so it makes way more sense if the gitlab-ci.yml files belong to the people who are owning the qemu-project on gitlab.com and take care of the gitlab CI there. Thus let's merge the gitlab-ci section into the common "test and build automation" section. And while we're at it, I'm also removing the line with Fam there for now, since he was hardly active during the last years in this area anymore. If he ever gets more time for this part again in the future, we surely can add the line back again. I'm also removing the Patchew URL from this section now since Patchew's files are not tracked in the main QEMU repo and it is also not maintained by Alex, Philippe and myself. The maintainers of Patchew are still listed more accurately in the wiki on https://wiki.qemu.org/AdminContacts & https://wiki.qemu.org/Testing/CI/Patchew instead. Now to avoid that Alex is listed here in this section alone, Philippe and I agreed to help as backup maintainers here, too. And Willian volunteered to be an additional reviewer. Message-Id: <20210309112356.737266-1-thuth@redhat.com> Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Willian Rampazzo <willianr@redhat.com> Acked-by:
Wainer dos Santos Moschetta <wainersm@redhat.com> Acked-by:
Fam Zheng <fam@euphon.net> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Thomas Huth authored
Make it clear that these files are related to benchmarks by moving them into a new folder called "bench". Message-Id: <20210312092238.79509-1-thuth@redhat.com> Acked-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Thomas Huth authored
The main tests directory still looks very crowded, and it's not clear which files are part of a unit tests and which belong to a different test subsystem. Let's clean up the mess and move the unit tests to a separate directory. Message-Id: <20210310063314.1049838-1-thuth@redhat.com> Acked-by:
Paolo Bonzini <pbonzini@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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- Mar 10, 2021
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Philippe Mathieu-Daudé authored
With the exception of hw/core/, the hw/ directory only contains device models used in system emulation. Semihosting is also used by user emulation. As a generic feature, move it out of hw/ directory. Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210226131356.3964782-3-f4bug@amsat.org> Message-Id: <20210305135451.15427-3-alex.bennee@linaro.org>
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Philippe Mathieu-Daudé authored
We want to move the semihosting code out of hw/ in the next patch. This patch contains the mechanical steps, created using: $ git mv include/hw/semihosting/ include/ $ sed -i s,hw/semihosting,semihosting, $(git grep -l hw/semihosting) Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210226131356.3964782-2-f4bug@amsat.org> Message-Id: <20210305135451.15427-2-alex.bennee@linaro.org>
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Alex Bennée authored
These tests make sure we can boot the Xen hypervisor with a Dom0 kernel using the guest-loader. We currently have to use a kernel I built myself because there are issues using the Debian kernel images. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Tested-by:
Cleber Rosa <crosa@redhat.com> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Cleber Rosa <crosa@redhat.com> Message-Id: <20210303173642.3805-8-alex.bennee@linaro.org>
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Alex Bennée authored
Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210303173642.3805-7-alex.bennee@linaro.org>
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Alex Bennée authored
We might as well surface this useful information in the manual so users can find it easily. It is a fairly simple conversion to rst with the only textual fixes being QemuOps to QemuOpts. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com> Message-Id: <20210303173642.3805-6-alex.bennee@linaro.org>
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Alex Bennée authored
Hypervisors, especially type-1 ones, need the firmware/bootcode to put their initial guest somewhere in memory and pass the information to it via platform data. The guest-loader is modelled after the generic loader for exactly this sort of purpose: $QEMU $ARGS -kernel ~/xen.git/xen/xen \ -append "dom0_mem=1G,max:1G loglvl=all guest_loglvl=all" \ -device guest-loader,addr=0x42000000,kernel=Image,bootargs="root=/dev/sda2 ro console=hvc0 earlyprintk=xen" \ -device guest-loader,addr=0x47000000,initrd=rootfs.cpio Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20210303173642.3805-5-alex.bennee@linaro.org>
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- Mar 09, 2021
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Wainer dos Santos Moschetta authored
The qemu-img.rst, qemu-nbd.rst, virtfs-proxy-helper.rst, qemu-trace-stap.rst, and virtiofsd.rst manuals were moved to docs/tools, so this update MAINTAINERS accordingly. Fixes: a08b4a9f ("docs: Move tools documentation to tools manual") Signed-off-by:
Wainer dos Santos Moschetta <wainersm@redhat.com> Reviewed-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by:
Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by:
Thomas Huth <thuth@redhat.com> Message-Id: <20210204135425.1380280-1-wainersm@redhat.com> Signed-off-by:
Laurent Vivier <laurent@vivier.eu>
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Warner Losh authored
The FreeBSD project has a number of enhancements to bsd-user. These changes have evolved over the past 10 year, and aren't currently updated to the latest version of qemu due to fluxuations in staffing causing us to fall behind in the past. We're working on porting all the changes forward and contributing all the changes back to qemu. Add myself as maintainer and Kyle Evans as a reviewer for changes. In addition, add a pointer to our github repo in the interim while this work is ongoing. Signed-off-by:
Warner Losh <imp@bsdimp.com> Reviewed-by:
Thomas Huth <thuth@redhat.com> Message-Id: <20210308224023.75187-1-imp@bsdimp.com> Reviewed-by:
Daniel P. Berrangé <berrange@redhat.com> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Emanuele Giuseppe Esposito authored
Change documentation style and fix minor typos in tests/qtest/libqos/qgraph.h to automatically generate sphinx documentation in docs/devel/qgraph.rst The mechanism explanation that once was in qgraph.h is now moved to qgraph.rst There is no functional change intended. Signed-off-by:
Emanuele Giuseppe Esposito <eesposit@redhat.com> Message-Id: <20210308073240.6363-1-eesposit@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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- Mar 08, 2021
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Vladimir Sementsov-Ogievskiy authored
Signed-off-by:
Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20210304103503.21008-1-vsementsov@virtuozzo.com> Reviewed-by:
Eric Blake <eblake@redhat.com> Signed-off-by:
Eric Blake <eblake@redhat.com>
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Peter Maydell authored
Add a simple qtest to exercise the new system counter device in the SSE-300. We'll add tests of the system timer device here too, so this includes scaffolding (register definitions, etc) for those. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Tested-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210219144617.4782-45-peter.maydell@linaro.org
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Peter Maydell authored
The SSE-300 has a new register block CPU<N>_PWRCTRL. There is one instance of this per CPU in the system (so just one for the SSE-300), and as well as the usual CIDR/PIDR ID registers it has just one register, CPUPWRCFG. This register allows the guest to configure behaviour of the system in power-down and deep-sleep states. Since QEMU does not model those, we make the register a dummy reads-as-written implementation. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Tested-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-id: 20210219144617.4782-21-peter.maydell@linaro.org
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Peter Maydell authored
The SSE-300 includes some timers which are a different kind to those in the SSE-200. Model them. These timers are documented in the SSE-123 Example Subsystem Technical Reference Manual: https://developer.arm.com/documentation/101370/latest/ Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Tested-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-id: 20210219144617.4782-13-peter.maydell@linaro.org
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Peter Maydell authored
The SSE-300 includes a counter module; implement a model of it. This counter is documented in the SSE-123 Example Subsystem Technical Reference Manual: https://developer.arm.com/documentation/101370/latest/ Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Tested-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-id: 20210219144617.4782-12-peter.maydell@linaro.org
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Vladimir Sementsov-Ogievskiy authored
Add new parallels-ext.c and myself as co-maintainer. Signed-off-by:
Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20210304095151.19358-1-vsementsov@virtuozzo.com> Reviewed-by:
Denis V. Lunev <den@openvz.org> Signed-off-by:
Kevin Wolf <kwolf@redhat.com>
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- Mar 06, 2021
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Philippe Mathieu-Daudé authored
We want to be able to use the 'SH4' config for architecture specific features. Add more fine-grained selection by adding a CONFIG_SH_PCI selector for the SH4 PCI controller. Move the file with the other PCI host devices in hw/pci-host and add its missing MAINTAINERS entries. Suggested-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Acked-by:
Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210222141514.2646278-8-f4bug@amsat.org>
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Philippe Mathieu-Daudé authored
Add more fine-grained selection by adding a CONFIG_TC58128 selector for the TC58128 eeprom. As this device is only used by the Shix machine, add an entry to the proper section in MAINTAINERS. Suggested-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Acked-by:
Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210222141514.2646278-7-f4bug@amsat.org>
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Philippe Mathieu-Daudé authored
We want to be able to use the 'SH4' config for architecture specific features. Add more fine-grained selection by adding a CONFIG_SH_TIMER selector for the SH4 timer control unit. Add the missing MAINTAINERS entries. Suggested-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Acked-by:
Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210222141514.2646278-6-f4bug@amsat.org>
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Philippe Mathieu-Daudé authored
We want to be able to use the 'SH4' config for architecture specific features. Add more fine-grained selection by adding a CONFIG_SH_SCI selector for the SH4 serial controller. Add the missing MAINTAINERS entries. Suggested-by:
Peter Maydell <peter.maydell@linaro.org> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Acked-by:
Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20210222141514.2646278-5-f4bug@amsat.org>
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- Mar 04, 2021
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Acked-by:
Bin Meng <bin.meng@windriver.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 6bc077e5ae4a9512c8adf81ae194718f2f17c402.1612836645.git.alistair.francis@wdc.com
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- Feb 21, 2021
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Jiaxun Yang authored
Test booting of PMON bootloader on loongson3-virt platform. $ (venv) AVOCADO_ALLOW_UNTRUSTED_CODE=1 \ avocado --show=app,console \ run -t machine:loongson3-virt tests/acceptance Fetching asset from tests/acceptance/machine_mips_loongson3v.py:MipsLoongson3v.test_pmon_serial_console JOB ID : 8e202b3727847c9104d0d3d6546ed225d35f6706 JOB LOG : /home/flygoat/avocado/job-results/job-2021-01-12T10.02-8e202b3/job.log (1/1) tests/acceptance/machine_mips_loongson3v.py:MipsLoongson3v.test_pmon_serial_console: console: PMON2000 MIPS Initializing. Standby... console: 00000000Jump to 9fc console: Init Memory done. console: The uncache data is: console: 00000000: 5555555555555555 console: 00000008: aaaaaaaaaaaaaaaa console: 00000010: 3333333333333333 console: 00000018: cccccccccccccccc console: 00000020: 7777777777777777 console: 00000028: 8888888888888888 console: 00000030: 1111111111111111 console: 00000038: eeeeeeeeeeeeeeee console: The cached data is: console: 00000000: 5555555555555555 console: 00000008: aaaaaaaaaaaaaaaa console: 00000010: 3333333333333333 console: 00000018: cccccccccccccccc console: 00000020: 7777777777777777 console: 00000028: 8888888888888888 console: 00000030: 1111111111111111 console: 00000038: eeeeeeeeeeeeeeee console: Copy PMON to execute location... console: start = 0x8f900000 console: s0 = 0x30300000 console: _edata = 0x8f989010 console: _end = 0x8f98a028copy text section done. console: Copy PMON to execute location done. console: sp=8f8fc000 console: Uncompressing Bios............................................................................OK,Booting Bios console: FREQ console: DONE console: DEVI console: ENVI console: MAPV console: NVRAM@8f7ff898 console: STDV console: 80100000: memory between 8f7ff400-8f800000 is already been allocated,heap is already above this point console: SBDD console: P12PCIH console: PCIH console: PCID console: setting up 1 bus console: PCI bus 0 slot 1: probe...completed console: PCI bus 0 slot 1/0: vendor/product: 0x106b/0x003f (serialbus, USB, interface: 0x10, revision: 0x00) console: PCI bus 0 slot 1/0: reg 0x10 = 0xffffff00 console: PCI bus 0 slot 2: probe...completed console: PCI bus 0 slot 2/0: vendor/product: 0x1af4/0x1000 (network, ethernet, interface: 0x00, revision: 0x00) console: PCI bus 0 slot 2/0: reg 0x10 = 0xffffffe1 console: PCI bus 0 slot 2/0: reg 0x14 = 0xfffff000 console: PCI bus 0 slot 2/0: reg 0x20 = 0xffffc00c console: PCI bus 0 slot 2/0: reg 0x30 = 0xfffc0000 console: PCI bus 0 slot 3: probe...completed console: PCI bus 0 slot 4: probe...completed console: PCI bus 0 slot 5: probe...completed console: PCI bus 0 slot 6: probe...completed console: PCI bus 0 slot 7: probe...completed console: PCI bus 0 slot 8: probe...completed console: PCI bus 0 slot 9: probe...completed console: PCI bus 0 slot 10: probe...completed console: PCI bus 0 slot 11: probe...completed console: PCI bus 0 slot 12: probe...completed console: PCI bus 0 slot 13: probe...completed console: PCI bus 0 slot 14: probe...completed console: PCI bus 0 slot 15: probe...completed console: PCI bus 0 slot 16: probe...completed console: PCI bus 0 slot 17: probe...completed console: PCI bus 0 slot 18: probe...completed console: PCI bus 0 slot 19: probe...completed console: PCI bus 0 slot 20: probe...completed console: PCI bus 0 slot 21: probe...completed console: PCI bus 0 slot 22: probe...completed console: PCI bus 0 slot 23: probe...completed console: PCI bus 0 slot 24: probe...completed console: PCI bus 0 slot 25: probe...completed console: PCI bus 0 slot 26: probe...completed console: PCI bus 0 slot 27: probe...completed console: PCI bus 0 slot 28: probe...completed console: PCI bus 0 slot 29: probe...completed console: PCI bus 0 slot 30: probe...completed console: PCI bus 0 slot 31: probe...completed console: PCIS console: PCIR console: PCIW console: PCI bus 0 slot 2/0: mem @0x40000000, reg 0x30 262144 bytes console: PCI bus 0 slot 2/0: mem @0x40040000, reg 0x20 16384 bytes console: PCI bus 0 slot 2/0: mem @0x40044000, reg 0x14 4096 bytes console: PCI bus 0 slot 1/0: mem @0x40045000, reg 0x10 256 bytes console: PCI bus 0 slot 2/0: exp @0x40000000, 262144 bytes console: PCI bus 0 slot 2/0: i/o @0x00004000, reg 0x10 32 bytes console: NETI console: RTCL console: PCID console: VGAI console: memorysize=c000000,base=8f6ff508,sysMem=8f6ef500 console: in setup_int_vect!done!VESA console: vga bios init failed, rc=-1 console: in configure console: mainbus0 (root) console: localbus0 at mainbus0 console: loopdev0 at mainbus0pcibr0 at mainbus0 console: pci0 at pcibr0 bus 0 console: ohci0 at pci0 dev 1 function 0 vendor/product: 0x106b/0x003f (serialbus, USB, interface: 0x10, revision: 0x00)usb base addr : 0xc0045000, bus_base is : 0xc0000000 console: OHCI revision: 0x00000010 console: RH: a: 0x00000203 b: 0x00000000 console: early period(0x0) console: OHCI 8c01ec00 initialized ok console: New Device 0 console: usb_get_descriptor console: bLength = 12 console: bDescriptorType =1 console: bcdUSB = 110 console: bDeviceClass =9 console: bDeviceSubClass =0 console: bDeviceProtocol =0 console: bMaxPacketSize0 =8 console: set address 1 console: usb_get_descriptor console: bLength = 12 console: bDescriptorType =1 console: bcdUSB = 110 console: bDeviceClass =9 console: bDeviceSubClass =0 console: bDeviceProtocol =0 console: bMaxPacketSize0 =8 console: idVendor =0 console: idProduct =0 console: bcdDevice =0 console: iManufacturer=0 console: iProduct =1 console: iSerialNumber=0 console: bNumConfigurations=1 console: usb_get_descriptor console: usb_get_descriptor console: get_conf_no 0 Result 25, wLength 25 console: if 0, ep 0 console: bLength=9 console: bDescriptorType=2 console: wTotalLength=19 console: bNumInterfaces=1 console: bConfigurationValue=1 console: iConfiguration=0 console: bmAttributes=40 console: MaxPower=0 console: 09 04 00 00 01 09 00 00 00 07 05 81 03 02 00 ff console: ##EP epmaxpacketin[1] = 2 console: set configuration 1 console: new device strings: Mfr=0, Product=1, SerialNumber=0 console: USB device number 1 default language ID 0x409 console: Manufacturer console: Product OHCI Root Hub console: SerialNumber console: New Device 1 console: usb_get_descriptor console: bLength = 12 console: bDescriptorType =1 console: bcdUSB = 200 console: bDeviceClass =0 console: bDeviceSubClass =0 console: bDeviceProtocol =0 console: bMaxPacketSize0 =8 console: set address 2 console: usb_get_descriptor console: bLength = 12 console: bDescriptorType =1 console: bcdUSB = 200 console: bDeviceClass =0 console: bDeviceSubClass =0 console: bDeviceProtocol =0 console: bMaxPacketSize0 =8 console: idVendor =627 console: idProduct =1 console: bcdDevice =0 console: iManufacturer=1 console: iProduct =4 console: iSerialNumber=b console: bNumConfigurations=1 console: usb_get_descriptor console: usb_get_descriptor console: get_conf_no 0 Result 34, wLength 34 console: unknown Description Type : 21 console: 09 21 11 01 00 01 22 3F 00 console: if 0, ep 0 console: bLength=9 console: bDescriptorType=2 console: wTotalLength=22 console: bNumInterfaces=1 console: bConfigurationValue=1 console: iConfiguration=8 console: bmAttributes=a0 console: MaxPower=32 console: 09 04 00 00 01 03 01 01 00 09 21 11 01 00 01 22 3f 00 07 05 81 03 08 00 0a console: ##EP epmaxpacketin[1] = 8 console: set configuration 1 console: new device strings: Mfr=1, Product=4, SerialNumber=11 console: USB device number 2 default language ID 0x409 console: Manufacturer QEMU console: Product QEMU USB Keyboard console: SerialNumber 68284-0000:00:01.0-1 console: drive at ohci0 devnum 2, Product QEMU USB Keyboard console: not configured console: New Device 2 console: usb_get_descriptor console: bLength = 12 console: bDescriptorType =1 console: bcdUSB = 200 console: bDeviceClass =0 console: bDeviceSubClass =0 console: bDeviceProtocol =0 console: bMaxPacketSize0 =8 console: set address 3 console: usb_get_descriptor console: bLength = 12 console: bDescriptorType =1 console: bcdUSB = 200 console: bDeviceClass =0 console: bDeviceSubClass =0 console: bDeviceProtocol =0 console: bMaxPacketSize0 =8 console: idVendor =627 console: idProduct =1 console: bcdDevice =0 console: iManufacturer=1 console: iProduct =3 console: iSerialNumber=a console: bNumConfigurations=1 console: usb_get_descriptor console: usb_get_descriptor console: get_conf_no 0 Result 34, wLength 34 console: unknown Description Type : 21 console: 09 21 01 00 00 01 22 4A 00 console: if 0, ep 0 console: bLength=9 console: bDescriptorType=2 console: wTotalLength=22 console: bNumInterfaces=1 console: bConfigurationValue=1 console: iConfiguration=7 console: bmAttributes=a0 console: MaxPower=32 console: 09 04 00 00 01 03 00 00 00 09 21 01 00 00 01 22 4a 00 07 05 81 03 08 00 0a console: ##EP epmaxpacketin[1] = 8 console: set configuration 1 console: new device strings: Mfr=1, Product=3, SerialNumber=10 console: USB device number 3 default language ID 0x409 console: Manufacturer QEMU console: Product QEMU USB Tablet console: SerialNumber 28754-0000:00:01.0-2 console: drive at ohci0 devnum 3, Product QEMU USB Tablet console: not configured console: drive at ohci0 devnum 1, Product OHCI Root Hub console: not configured console: vendor/product: 0x1af4/0x1000 (network, ethernet, interface: 0x00, revision: 0x00) at pci0 dev 2 function 0 not configured console: out configure console: Press <Del> to set BIOS,waiting for 3 seconds here..... console: devconfig done. console: ifinit done. console: domaininit done. console: init_proc.... console: HSTI console: SYMI console: SBDE console: [[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[ console: [[ [[[[[[[[[ [[[[[ [[[[ [[[[[ [[[[[ [[[[[ [[[[[ [[[[ [[[[[ [[ console: [[ [[[[[[[[ [[[[ [[[ [[[[ [[[ [[[[ [[[[ [[[[ [[[ [[[[ [[[ [[[[ [[[ [[[[ [[ console: [[ [[[[[[[[ [[[[[[ [[[ [[[[[[ [[[ [ [[[ [[[ [[[[[[[[[[[[ [[[[[[[ [[[[[[ [[[ [ [[[ [[ console: [[ [[[[[[[[ [[[[[[ [[[ [[[[[[ [[[ [[ [[ [[[ [[[ [[[[[[[ [[[[ [[[[[[ [[[ [[ [[ [[ console: [[ [[[[[[[[ [[[[[[ [[[ [[[[[[ [[[ [[[ [ [[[ [[[[[ [[[[[[[[[[ [[[ [[[[[[ [[[ [[[ [ [[ console: [[ [[[[[[[[ [[[[ [[[ [[[[ [[[ [[[[ [[[ [[[[ [[[ [[[ [[[[ [[[[ [[[ [[[[ [[ console: [[ [[[[ [[[[[ [[[[ [[[[[ [[[[ [[[[[ [[[[[[ [[[[ [[[[[ [[ console: [[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[2011 Loongson][[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[[ console: Configuration [Bonito,EL,NET,SCSI,IDE] console: Version: PMON2000 3.3 (Bonito) #0: Tue Dec 22 01:58:09 UTC 2020 commit b3ece66234adbf7d4e453f0ba4f326c099ac2a76 Author: Jiaxun Yang <jiaxun.yang@flygoat.com> Date: Tue Dec 22 09:51:10 2020 +0800 . console: Supported loaders [txt, srec, elf, bin] console: Supported filesystems [net, fat, fs, disk, iso9660, socket, tty, ram] console: This software may be redistributed under the BSD copyright. console: Copyright 2000-2002, Opsycon AB, Sweden. console: Copyright 2005, ICT CAS. console: CPU GODSON3 BogoMIPS: 1327 PASS (3.89 s) RESULTS : PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | CANCEL 0 JOB TIME : 4.38 s Signed-off-by:
Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210112020708.62922-1-jiaxun.yang@flygoat.com> [PMD: Set timeout to 60sec, simply test for ''CPU GODSON3 BogoMIPS'] Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org>
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- Feb 20, 2021
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Philippe Mathieu-Daudé authored
Update the F: line after the Meson refactor. Fixes: 1bb4cb1c..73362fc0 ("default-configs: ...") Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Laurent Vivier <laurent@vivier.eu> Message-Id: <20201117114656.1222555-1-f4bug@amsat.org> Signed-off-by:
Laurent Vivier <laurent@vivier.eu>
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Christian Schoenebeck authored
I already used this github URL for PRs before and will continue to use it in foreseeable future. Signed-off-by:
Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by:
Greg Kurz <groug@kaod.org> Message-Id: <E1l5rYG-0005sv-87@lizzy.crudebyte.com> Signed-off-by:
Laurent Vivier <laurent@vivier.eu>
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Philippe Mathieu-Daudé authored
There is new interest in the SD/MMC device emulation, so it would be good to have more than only one maintainer / reviewer for it. Bin Meng proved by his contributions a deep understanding of the SD cards internals, so let's add him to the corresponding section in the MAINTAINERS file. Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by:
Bin Meng <bin.meng@windriver.com> Message-Id: <20210216132841.1121653-1-f4bug@amsat.org>
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- Feb 18, 2021
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Taylor Simpson authored
Add Taylor Simpson as the Hexagon target maintainer Signed-off-by:
Taylor Simpson <tsimpson@quicinc.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <1612763186-18161-2-git-send-email-tsimpson@quicinc.com> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Alex Bennée authored
This is just a simple test to count the instructions executed by a kernel. However a later test will detect a failure condition when icount is enabled. Signed-off-by:
Alex Bennée <alex.bennee@linaro.org> Tested-by:
Wainer dos Santos Moschetta <wainersm@redhat.com> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20210213130325.14781-16-alex.bennee@linaro.org>
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