- May 19, 2021
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Richard Henderson authored
We must leave the 'int rwx' parameter to ppc_hash32_handle_mmu_fault for now, but will clean that up later. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-5-richard.henderson@linaro.org> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
We must leave the 'int rwx' parameter to ppc_hash64_handle_mmu_fault for now, but will clean that up later. Signed-off-by:
Ricgard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-4-richard.henderson@linaro.org> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
We must leave the 'int rwx' parameter to ppc_radix64_handle_mmu_fault for now, but will clean that up later. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-3-richard.henderson@linaro.org> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
Use this in the three places we currently have a local array indexed by rwx (which happens to have the same values). The types will match up correctly with additional changes. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210518201146.794854-2-richard.henderson@linaro.org> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Giuseppe Musacchio authored
TARGET_WORDS_BIGENDIAN may not match the machine endianness if that's a runtime-configurable parameter. Fixes: bcb0b7b1 Fixes: afae37d9 Resolves: https://gitlab.com/qemu-project/qemu/-/issues/212 Signed-off-by:
Giuseppe Musacchio <thatlemon@gmail.com> Message-Id: <20210518133020.58927-1-thatlemon@gmail.com> Tested-by:
Paul A. Clarke <pc@us.ibm.com> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
The special logging is unnecessary. It will have been done immediately before in the log file. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by:
Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210517205025.3777947-9-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210517205025.3777947-8-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
We do not need to emit an exit_tb after an exception, as the latter will exit via longjmp. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210517205025.3777947-7-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
When single-stepping, force max_insns to 1 in init_disas so that we exit the translation loop immediately. Combine the single-step checks in tb_stop, and give the gdb exception priority over the cpu exception, just as we already do in gen_lookup_and_goto_ptr. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210517205025.3777947-6-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
Now that we have removed all of the fake exceptions, and all real exceptions exit via DISAS_NORETURN, we can remove this field. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210517205025.3777947-5-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
The translation of branch instructions always results in exit from the TB. Remove the synthetic "exception" after no more uses. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210517205025.3777947-4-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
Remove the synthetic "exception" after no more uses. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210517205025.3777947-3-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
Create a function to handle the details for interacting with icount. Force the exit from the tb via DISAS_TOO_MANY, which allows chaining to the next tb, where the code emitted for gen_tb_start() will determine if we must exit. We can thus remove any matching conditional call to gen_stop_exception. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210517205025.3777947-2-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
Since ba3e7926, we switched the implementation of icount to always reset can_do_io at the start of the following TB. Most of them were removed in 9e9b10c6, but some were missed. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-10-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
Remove the synthetic "exception" after no more uses. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-9-matheus.ferst@eldorado.org.br> Reviewed-by:
Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
Rewrite ppc_tr_tb_stop to handle these new codes. Convert ctx->exception into these new codes at the end of ppc_tr_translate_insn, prior to pushing the change back throughout translate.c. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-8-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
Two of the call sites that use gen_debug_exception have already updated NIP. Only ppc_tr_breakpoint_check requires the update. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-7-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
Since POWERPC_EXCP_TRAP is raised by gen_exception_err, we will have also set DISAS_NORETURN. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Luis Pires <luis.pires@eldorado.org.br> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-6-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
Since POWERPC_SYSCALL is raised by gen_exception_err, we will have also set DISAS_NORETURN. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Luis Pires <luis.pires@eldorado.org.br> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-5-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
There are other valid settings for is_jmp besides DISAS_NEXT and DISAS_NORETURN, so eliminating that dichotomy from ppc_tr_translate_insn is helpful. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Luis Pires <luis.pires@eldorado.org.br> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-4-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Luis Pires <luis.pires@eldorado.org.br> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-3-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Richard Henderson authored
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org> Reviewed-by:
Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Reviewed-by:
Luis Pires <luis.pires@eldorado.org.br> Signed-off-by:
Matheus Ferst <matheus.ferst@eldorado.org.br> Message-Id: <20210512185441.3619828-2-matheus.ferst@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Bruno Larsen (billionai) authored
This function was forgotten in the cpu_init code motion series, but it seems to be used regardless of TCG, and so needs to be moved to support disabling TCG. Signed-off-by:
Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210512140813.112884-4-bruno.larsen@eldorado.org.br> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Bruno Larsen (billionai) authored
Moved this function that is required in !TCG cases into a common code file Signed-off-by:
Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210512140813.112884-3-bruno.larsen@eldorado.org.br> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> [dwg: Fixed compile error with linux-user targets] Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Bruno Larsen (billionai) authored
Updated the code in machine.c to use the generic ppc_{store,get}_vscr instead of helper style functions, so it can build without TCG Signed-off-by:
Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210512140813.112884-7-bruno.larsen@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Bruno Larsen (billionai) authored
Some functions unrelated to TCG use helper_m{t,f}vscr, so generic versions of those functions were added to cpu.c, in preparation for compilation without TCG Signed-off-by:
Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210512140813.112884-2-bruno.larsen@eldorado.org.br> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Bruno Larsen (billionai) authored
finished isolation of CPU initialization logic from translation logic. CPU initialization now only has common code and may or may not call accelerator-specific code, as the build options require. Signed-off-by:
Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Reviewed-by:
David Gibson <david@gibson.dropbear.id.au> Message-Id: <20210507115551.11436-1-bruno.larsen@eldorado.org.br> [dwg: Fix compile error with clang linux-user builds] Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Bruno Larsen (billionai) authored
To be able to compile translate_init.c.inc as a standalone file, we have to make the callbacks accessible outside of translate.c; This patch does exactly that Signed-off-by:
Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Message-Id: <20210507115512.11376-1-bruno.larsen@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Lucas Mateus Castro (alqotel) authored
Moved has_spr to cpu.h as ppc_has_spr and turned it into an inline function. Change spr verification in pnv.c and spapr.c to a version that can compile in a !TCG environment. Signed-off-by:
Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20210507164146.67086-1-lucas.araujo@eldorado.org.br> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Lucas Mateus Castro (alqotel) authored
Moved the function ppc_store from mmu-hash64.c to misc_helper.c and the prototype from mmu-hash64.h to cpu.h as it is a more appropriate place, but it will have to have its implementation moved to a new file as misc_helper.c should not be compiled in a !TCG environment. Signed-off-by:
Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20210506163941.106984-4-lucas.araujo@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Lucas Mateus Castro (alqotel) authored
The function ppc_hash64_filter_pagesizes has been moved from a function with prototype in mmu-hash64.h and implemented in mmu-hash64.c to a static function in hw/ppc/spapr_caps.c as it's only used in that file. Signed-off-by:
Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20210506163941.106984-3-lucas.araujo@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Lucas Mateus Castro (alqotel) authored
The hypercalls h_enter, h_remove, h_bulk_remove, h_protect, and h_read, have been moved to spapr_softmmu.c with the functions they depend on. The functions is_ram_address and push_sregs_to_kvm_pr are not static anymore as functions on both spapr_hcall.c and spapr_softmmu.c depend on them. The hypercalls h_resize_hpt_prepare and h_resize_hpt_commit have been divided, the KVM part stayed in spapr_hcall.c while the softmmu part was moved to spapr_softmmu.c Signed-off-by:
Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20210506163941.106984-2-lucas.araujo@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Bruno Larsen (billionai) authored
Moved all read and write callbacks for SPRs away from translate_init.c.inc and into translate.c; these functions are TCG only, so this motion is required to enable building with the flag disable-tcg Signed-off-by:
Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210506190837.6921-1-bruno.larsen@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Bruno Larsen (billionai) authored
Renamed all gen_spr_* and gen_* functions specifically related to registering SPRs to register_*_sprs and register_*, to avoid future confusion with other TCG related code. Signed-off-by:
Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210505155310.62710-2-bruno.larsen@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Bruno Larsen (billionai) authored
folded gen_{read,write}_xer into their only callers, spr_{read,write}_xer Signed-off-by:
Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210504140157.76066-2-bruno.larsen@eldorado.org.br> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Fabiano Rosas authored
Starting with Linux kernel v5.12 we dropped support[1] in KVM for hosts that can't have their threads running in different MMU modes (POWER9 < DD2.2). In these hosts, KVM will no longer report the KVM_CAP_PPC_MMU_HASH_V3 capability[2] when the host is running Radix. For guests that support both MMU modes, the negotiation during CAS will make sure it selects the correct one. For guests that only support Hash, such as P8 compat mode guests, the following error is currently thrown: $ ~/qemu-system-ppc64 -machine pseries,accel=kvm,max-cpu-compat=power8 ... error: kvm run failed Invalid argument NIP 0000000000000100 LR 0000000000000000 CTR 0000000000000000 XER 0000000000000000 CPU#0 MSR 8000000000001000 HID0 0000000000000000 HF 8000000000000000 iidx 3 didx 3 TB 00000000 00000000 DECR 0 GPR00 0000000000000000 0000000000000000 0000000000000000 000000007ff00000 GPR04 0000000000000000 0000000000000000 0000000000000000 0000000000000000 GPR08 0000000000000000 0000000000000000 0000000000000000 0000000000000000 GPR12 0000000000000000 0000000000000000 0000000000000000 0000000000000000 GPR16 0000000000000000 0000000000000000 0000000000000000 0000000000000000 GPR20 0000000000000000 0000000000000000 0000000000000000 0000000000000000 GPR24 0000000000000000 0000000000000000 0000000000000000 0000000000000000 GPR28 0000000000000000 0000000000000000 0000000000000000 0000000000000000 CR 00000000 [ - - - - - - - - ] RES ffffffffffffffff SRR0 0000000000000000 SRR1 0000000000000000 PVR 00000000004e1201 VRSAVE 0000000000000000 SPRG0 0000000000000000 SPRG1 0000000000000000 SPRG2 0000000000000000 SPRG3 0000000000000000 SPRG4 0000000000000000 SPRG5 0000000000000000 SPRG6 0000000000000000 SPRG7 0000000000000000 HSRR0 0000000000000000 HSRR1 0000000000000000 CFAR 0000000000000000 LPCR 000000000004f01f PTCR 0000000000000000 DAR 0000000000000000 DSISR 0000000000000000 This patch adds a verification during the writing of the platform support vector so that we error out as soon as we determine this guest only supports Hash and the host doesn't. ~/qemu-system-ppc64 -machine pseries,accel=kvm,max-cpu-compat=power8 ... qemu-system-ppc64: Guest requested unavailable MMU mode (hash). 1- https://git.kernel.org/torvalds/p/b1b1697ae0cc8 2- https://git.kernel.org/torvalds/p/a722076e94702 Signed-off-by:
Fabiano Rosas <farosas@linux.ibm.com> Message-Id: <20210505001130.3999968-3-farosas@linux.ibm.com> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Fabiano Rosas authored
A following patch will make use of it. Signed-off-by:
Fabiano Rosas <farosas@linux.ibm.com> Message-Id: <20210505001130.3999968-2-farosas@linux.ibm.com> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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- May 18, 2021
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Peter Maydell authored
linux-user pull request 20210517 - alpha sigaction fixes/cleanups - s390x sigaction fixes/cleanup - sparc sigaction fixes/cleanup - s390x core dumping support - core dump fix (app name) - arm fpa11 fix and cleanup - strace fixes (unshare(), llseek()) - fix copy_file_range() - use GDateTime - Remove dead code # gpg: Signature made Tue 18 May 2021 06:31:12 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-6.1-pull-request: (59 commits) linux-user/elfload: add s390x core dumping support linux-user/elfload: fix filling psinfo->pr_psargs linux-user: Tidy TARGET_NR_rt_sigaction linux-user/alpha: Share code for TARGET_NR_sigaction linux-user/alpha: Define TARGET_ARCH_HAS_KA_RESTORER linux-user: Honor TARGET_ARCH_HAS_SA_RESTORER in do_syscall linux-user: Pass ka_restorer to do_sigaction linux-user/alpha: Rename the sigaction restorer field linux-user/alpha: Fix rt sigframe return linux-user: use GDateTime for formatting timestamp for core file linux-user: Fix erroneous conversion in copy_file_range linux-user: Add copy_file_range to strace.list linux-user/s390x: Handle vector regs in signal stack linux-user/s390x: Clean up signal.c linux-user/s390x: Add build asserts for sigset sizes linux-user/s390x: Fix frame_addr corruption in setup_frame linux-user/s390x: Add stub sigframe argument for last_break linux-user/s390x: Set psw.mask properly for the signal handler linux-user/s390x: Clean up single-use gotos in signal.c linux-user/s390x: Tidy save_sigregs ... Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Peter Maydell authored
emulated nvme updates * various fixes (Gollu Appalanaidu) * refactoring (me) * move to hw/nvme from hw/block (me) # gpg: Signature made Mon 17 May 2021 10:16:01 BST # gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9 # gpg: Good signature from "Klaus Jensen <its@irrelevant.dk>" [unknown] # gpg: aka "Klaus Jensen <k.jensen@samsung.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838 # Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9 * remotes/nvme/tags/nvme-next-pull-request: hw/nvme: move nvme emulation out of hw/block hw/block/nvme: move zoned constraints checks hw/block/nvme: remove irrelevant zone resource checks hw/block/nvme: remove num_namespaces member hw/block/nvme: streamline namespace array indexing hw/block/nvme: add metadata offset helper hw/block/nvme: cache lba and ms sizes hw/block/nvme: replace nvme_ns_status hw/block/nvme: remove non-shared defines from header file hw/block/nvme: cleanup includes hw/block/nvme: consolidate header files hw/block/nvme: rename __nvme_select_ns_iocs hw/block/nvme: rename __nvme_advance_zone_wp hw/block/nvme: rename __nvme_zrm_open hw/block/nvme: align with existing style hw/block/nvme: function formatting fix hw/block/nvme: fix io-command set profile feature hw/block/nvme: consider metadata read aio return value in compare hw/block/nvme: rename reserved fields declarations hw/block/nvme: remove redundant invalid_lba_range trace Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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Peter Maydell authored
Minor MAINTAINERS update. Tweak to includes. Add tcg_constant_tl. Improve constant pool dump. # gpg: Signature made Sun 16 May 2021 15:08:42 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth-gitlab/tags/pull-tcg-20210516: accel/tcg: Align data dumped at end of TB tcg: Add tcg_constant_tl exec/gen-icount.h: Add missing "exec/exec-all.h" include MAINTAINERS: Add include/exec/gen-icount.h to 'Main Loop' section Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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