- Sep 16, 2023
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Richard Henderson authored
Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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- Sep 15, 2023
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Richard Henderson authored
Detect PMULL in cpuinfo; implement the accel hook. Acked-by:
Ard Biesheuvel <ardb@kernel.org> Tested-by:
Ard Biesheuvel <ardb@kernel.org> Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Detect PCLMUL in cpuinfo; implement the accel hook. Reviewed-by:
Ard Biesheuvel <ardb@kernel.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Reviewed-by:
Ard Biesheuvel <ardb@kernel.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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- Jul 25, 2023
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Michael Tokarev authored
Signed-off-by:
Michael Tokarev <mjt@tls.msk.ru> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org>
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Michael Tokarev authored
Signed-off-by:
Michael Tokarev <mjt@tls.msk.ru> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org>
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- Jul 08, 2023
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Richard Henderson authored
Detect CRYPTO in cpuinfo; implement the accel hooks. Reviewed-by:
Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Detect AES in cpuinfo; implement the accel hooks. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Detect AES in cpuinfo; implement the accel hooks. Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Add a primitive for InvSubBytes + InvShiftRows + AddRoundKey + InvMixColumns. Acked-by:
Daniel P. Berrangé <berrange@redhat.com> Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Add a primitive for InvSubBytes + InvShiftRows + InvMixColumns + AddRoundKey. Acked-by:
Daniel P. Berrangé <berrange@redhat.com> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Add a primitive for SubBytes + ShiftRows + MixColumns + AddRoundKey. Acked-by:
Daniel P. Berrangé <berrange@redhat.com> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Add a primitive for InvMixColumns. Acked-by:
Daniel P. Berrangé <berrange@redhat.com> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Add a primitive for MixColumns. Acked-by:
Daniel P. Berrangé <berrange@redhat.com> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Add a primitive for InvSubBytes + InvShiftRows + AddRoundKey. Reviewed-by:
Daniel P. Berrangé <berrange@redhat.com> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Start adding infrastructure for accelerating guest AES. Begin with a SubBytes + ShiftRows + AddRoundKey primitive. Acked-by:
Daniel P. Berrangé <berrange@redhat.com> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Move the code from tcg/. Fix a bug in that PPC_FEATURE2_ARCH_3_10 is actually spelled PPC_FEATURE2_ARCH_3_1. Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by:
Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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- Jun 20, 2023
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Richard Henderson authored
The macOS catalina compiler produces an error for __int128_t as the type for allocation with SSE inline asm constraint. Create a new X86Int128Union type and use the vector type for all SSE register inputs and outputs. Tested-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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- May 30, 2023
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Richard Henderson authored
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
With CPUINFO_ATOMIC_VMOVDQA, we can perform proper atomic load/store without cmpxchg16b. Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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- May 24, 2023
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Richard Henderson authored
With FEAT_LSE2, load and store of int128 is directly supported. Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Use __sync_bool_compare_and_swap_16 to control the loop, rather than a separate comparison. Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Create both atomic16_read_ro and atomic16_read_rw. Previously we pretended that we had atomic16_read in system mode, because we "know" that all ram is always writable to the host. Now, expose read-only and read-write versions all of the time. For aarch64, do not fall back to __atomic_read_16 even if supported by the compiler, to work around a clang bug. Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
These symbols will shortly become dynamic runtime tests and therefore not appropriate for the preprocessor. Use the matching CONFIG_* symbols for that purpose. Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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- May 23, 2023
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Richard Henderson authored
Not only the routines in ldst_atomicity.c.inc need markup, but also the ones in the headers. Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Separates the aarch64-specific portion into its own file. Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Separates the aarch64-specific portion into its own file. Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Move the code from tcg/. The only use of these bits so far is with respect to the atomicity of tcg operations. Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Add a bit to indicate when VMOVDQU is also atomic if aligned. Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
Add cpuinfo.h for i386 and x86_64, and the initialization for that in util/. Populate that with a slightly altered copy of the tcg host probing code. Other uses of cpuid.h will be adjusted one patch at a time. Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Juan Quintela <quintela@redhat.com> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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Richard Henderson authored
The entire contents of the header is host-specific, but the existence of such a header is not, which could prevent some host specific ifdefs at the top of the file for the include. Add host/include/{arch,generic} to the project arguments. Reviewed-by:
Alex Bennée <alex.bennee@linaro.org> Reviewed-by:
Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by:
Juan Quintela <quintela@redhat.com> Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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