- Aug 23, 2011
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Alexander Graf authored
When an exception occurs on BookE, we need to set ESR bits to expose to the guest information on what exactly happened. Add the obvious ones. Reported-by:
Jason Wessel <jason.wessel@windriver.com> Signed-off-by:
Alexander Graf <agraf@suse.de> Signed-off-by:
Edgar E. Iglesias <edgar.iglesias@gmail.com>
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Alexander Graf authored
When accessing an SPE instruction despite it being not available, throw an SPE exception instead of an APU exception. That way the guest knows what's going on and actually uses SPE. Reported-by:
Jason Wessel <jason.wessel@windriver.com> Signed-off-by:
Alexander Graf <agraf@suse.de> Signed-off-by:
Edgar E. Iglesias <edgar.iglesias@gmail.com>
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Alexander Graf authored
The BookE spec specifies a number of ESR bits. Add defines for them so we can use them later on. Reported-by:
Jason Wessel <jason.wessel@windriver.com> Signed-off-by:
Alexander Graf <agraf@suse.de> Signed-off-by:
Edgar E. Iglesias <edgar.iglesias@gmail.com>
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- Aug 21, 2011
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Anthony Liguori authored
qemu_malloc/qemu_free no longer exist after this commit. Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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- Aug 07, 2011
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Blue Swirl authored
Parameter is_softmmu (and its evil mutant twin brother is_softmuu) is not used in cpu_*_handle_mmu_fault() functions, remove them and adjust callers. Acked-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
Blue Swirl <blauwirbel@gmail.com>
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- Aug 05, 2011
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Jan Kiszka authored
Do not allocate TCG-only resources like the translation buffer when running over KVM or XEN. Saves a "few" bytes in the qemu address space and is also conceptually cleaner. Signed-off-by:
Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by:
Anthony Liguori <aliguori@us.ibm.com>
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- Jul 30, 2011
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Blue Swirl authored
Move softmmu_exec.h include directives from target-*/exec.h to target-*/op_helper.c. Move also various other stuff only used in op_helper.c there. Define global env in dyngen-exec.h. For i386, move wrappers for segment and FPU helpers from user-exec.c to op_helper.c. Implement raise_exception_err_env() to handle dynamic CPUState. Move the function declarations to cpu.h since they can be used outside of op_helper.c context. LM32, s390x, UniCore32: remove unused cpu_halted(), regs_to_env() and env_to_regs(). ARM: make raise_exception() static. Convert #include "exec.h" to #include "cpu.h" #include "dyngen-exec.h" and remove now unused target-*/exec.h. Signed-off-by:
Blue Swirl <blauwirbel@gmail.com>
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- Jul 12, 2011
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Peter Maydell authored
Remove the include of setjmp.h from the cpu.h of target-alpha and target-ppc. This is unnecessary because cpu-defs.h already includes this header; this change brings these two targets into line with all the rest. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Blue Swirl <blauwirbel@gmail.com>
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- Jun 26, 2011
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Blue Swirl authored
Most exec-all.h include directives are now useless, remove them. Signed-off-by:
Blue Swirl <blauwirbel@gmail.com>
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Blue Swirl authored
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This is needed by later patches. Signed-off-by:
Blue Swirl <blauwirbel@gmail.com>
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Blue Swirl authored
Before the next patch, fix coding style of the areas affected. Change the type of the return value from cpu_has_work() and qemu_cpu_has_work() to bool. Signed-off-by:
Blue Swirl <blauwirbel@gmail.com>
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Blue Swirl authored
Make cpu_loop_exit() take a parameter for CPUState instead of relying on global env. Signed-off-by:
Blue Swirl <blauwirbel@gmail.com>
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- Jun 20, 2011
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Jan Kiszka authored
No longer needed with accompanied kernel headers. CC: Alexander Graf <agraf@suse.de> Signed-off-by:
Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by:
Alexander Graf <agraf@suse.de> Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com>
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Jan Kiszka authored
Required header support is now unconditionally available. CC: Alexander Graf <agraf@suse.de> Signed-off-by:
Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by:
Alexander Graf <agraf@suse.de> Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com>
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- Jun 17, 2011
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Alexander Graf authored
Until now, we've created a union over multiple different TLB types and allocated that union. While it's a waste of memory (and cache) to allocate TLB information for a TLB type with much information when you only need little, it also inflicts another issue. With the new KVM API, we can now share the TLB between KVM and qemu, but for that to work we need to have both be in the same layout. We can't just stretch it over to fit some internal different TLB representation. Hence this patch moves all TLB types to their own array, allowing us to only address and allocate exactly the boundaries required for the specific TLB type at hand. Signed-off-by:
Alexander Graf <agraf@suse.de>
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Alexander Graf authored
The natural format for e500 cores to do TLB manipulation with are the MAS registers. Instead of converting them into some internal representation and back again when the guest reads them, we can just keep the data identical to the way the guest passed it to us. The main advantage of this approach is that we're getting closer to being able to share MMU data with KVM using shared memory, so that we don't need to copy lots of MMU data back and forth all the time. For this to work however, another patch is required that gets rid of the TLB union, as that destroys our memory layout that needs to be identical with the kernel one. Signed-off-by:
Alexander Graf <agraf@suse.de>
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Alexander Graf authored
As Nathan pointed out correctly, the mtmsr instruction does not modify the high 32 bits of MSR. It also doesn't matter if SF is set or not, the instruction always behaves the same. This patch moves it a bit closer to the spec. Reported-by:
Nathan Whitehorn <nwhitehorn@freebsd.org> Signed-off-by:
Alexander Graf <agraf@suse.de>
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Hervé Poussineau authored
On at least the PowerPC 601, a direct-store (T=1) with bus unit ID 0x07F is special-cased as memory-forced I/O controller access. It is supposed to be checked immediately if T=1, bypassing all protection mechanisms and acting cache-inhibited and global. Signed-off-by:
Hervé Poussineau <hpoussin@reactos.org> Simplified by avoiding reindentation. Added explanatory comments. Cc: Alexander Graf <agraf@suse.de> Signed-off-by:
Andreas Färber <andreas.faerber@web.de> Signed-off-by:
Alexander Graf <agraf@suse.de>
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- Jun 08, 2011
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Alexandre Raymond authored
This patch removes all references to signal.h when qemu-common.h is included as they become redundant. Signed-off-by:
Alexandre Raymond <cerbere@gmail.com> Signed-off-by:
Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
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- Jun 03, 2011
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Aurelien Jarno authored
target-ppc has been switched to softfloat only long ago, but a few #ifdef CONFIG_SOFTFLOAT have been forgotten. Remove them. Cc: Alexander Graf <agraf@suse.de> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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Alexander Graf authored
When compiling qemu with kvm support on BookE PPC machines, I get the following error: cc1: warnings being treated as errors /tmp/qemu/target-ppc/kvm.c: In function 'kvm_arch_get_registers': /tmp/qemu/target-ppc/kvm.c:188: error: unused variable 'sregs' This is due to overly ambitious #ifdef'ery introduced in 90dc88. Fix it by keeping code that doesn't depend on new headers alive for the compiler, but never executed due to failing capability checks. CC: Scott Wood <scottwood@freescale.com> Signed-off-by:
Alexander Graf <agraf@suse.de>
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Stefan Weil authored
When QEMU was configured with --enable-debug-tcg, compilation fails in spr_write_booke206_mmucsr0() and in spr_write_booke_pid(). Similar changes are also needed in conditional code which is normally unused. Cc: Alexander Graf <agraf@suse.de> Signed-off-by:
Stefan Weil <weil@mail.berlios.de> Signed-off-by:
Alexander Graf <agraf@suse.de>
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- May 22, 2011
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Stefan Weil authored
Signed-off-by:
Stefan Weil <weil@mail.berlios.de> Signed-off-by:
Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
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Blue Swirl authored
tb_invalidate_page_range() was intended to be used to invalidate an area of a TB which the guest explicitly flushes from i-cache. However, QEMU detects writes to code areas where TBs have been generated, so his has never been useful. Delete the function, adjust callers. Reviewed-by:
Richard Henderson <rth@twiddle.net> Signed-off-by:
Blue Swirl <blauwirbel@gmail.com>
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- May 20, 2011
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David Gibson authored
Early ppc64 CPUs include a hack to partially simulate the ppc32 segment registers, by translating writes to them into writes to the SLB. This is not used by any current Linux kernel, but it is used by the openbios used in the qemu mac99 model. Commit 81762d6d, cleaning up the SLB handling introduced a bug in this code, breaking the openbios currently in qemu. Specifically, there was an off by one error bitshuffling the register format used by mtsr into the format needed for the SLB load, causing the flag bits to end up in the wrong place. This caused the storage keys to be wrong under openbios, meaning that the translation code incorrectly thought a legitimate access was a permission violation. This patch fixes the bug, at the same time it fixes some build bug in the MMU debugging code (only exposed when DEBUG_MMU is enabled). Signed-off-by:
David Gibson <david@gibson.dropbear.id.au> Signed-off-by:
Alexander Graf <agraf@suse.de>
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Stefan Weil authored
ulong is undefined for w32 (and maybe other) compilations. Replace it by uintptr_t (which also fixes compilation for w64 and is a better choice for pointer to integer conversions). Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by:
Stefan Weil <weil@mail.berlios.de> Reviewed-by:
Aurelien Jarno <aurelien@aurel32.net> Signed-off-by:
Alexander Graf <agraf@suse.de>
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- May 11, 2011
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Alexander Graf authored
Most of the code to support e500 style MMUs is already in place, but we're missing on some of the special TLB0-TLB1 handling code and slightly different TLB modification. This patch adds support for the FSL style MMU. Signed-off-by:
Alexander Graf <agraf@suse.de>
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Alexander Graf authored
To enable quick runtime detection of instruction groups to the currently selected CPU emulation, we have a feature mask of what exactly the respective instruction supports. This feature mask is 64 bits long and we just successfully exceeded those 64 bits. To add more features, we need to think of something. The easiest solution that came to my mind was to simply add another 64 bits that we can also match on. Since the comparison is only done on start of the qemu process to generate an internal opcode calling table, we should be fine on any performance penalties here. Signed-off-by:
Alexander Graf <agraf@suse.de>
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Alexander Graf authored
The BookE specification defines MSR bit 28 as Guest State. Add it to the list of MSR macros. Signed-off-by:
Alexander Graf <agraf@suse.de>
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- May 09, 2011
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Alexander Graf authored
When compiling Qemu with older kernel headers, the PVR setting mechanism isn't available yet. Unfortunately, back then I didn't add a capability we could check against, so all we can do is add a configure test to see if we support PVR setting. For BookE, we don't care yet. This fixes compilation errors with KVM enabled on older kernel headers (like 2.6.32). Signed-off-by:
Alexander Graf <agraf@suse.de>
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Scott Wood authored
Read them via KVM_GET_SREGS in kvm_arch_get_registers(), and display them in "info registers". Also get CR and PID from the existing KVM_GET_REGS. Signed-off-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Alexander Graf <agraf@suse.de>
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Scott Wood authored
Classic/server ppc has had SREGS for a while now (though I think not always?), but it's still missing for booke. Check the capability before calling KVM_SET_SREGS. Without this, booke kvm fails to boot as of commit 84b4915d (kvm: Handle kvm_init_vcpu errors). Also, don't write random stack state into the non-PVR sregs fields -- have kvm fill it in first. Eventually booke will have sregs and it will have its own capability to be tested here. However, we will want a way for platform code to request to look like the actual CPU we're running on, especially if SoC devices are being directly assigned. Signed-off-by:
Scott Wood <scottwood@freescale.com> Signed-off-by:
Alexander Graf <agraf@suse.de>
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- May 08, 2011
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Stefan Weil authored
Signed-off-by:
Stefan Weil <weil@mail.berlios.de> Signed-off-by:
Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
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Stefan Weil authored
Signed-off-by:
Stefan Weil <weil@mail.berlios.de> Signed-off-by:
Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
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- Apr 20, 2011
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Stefan Weil authored
The previous patch removed the need for parameter puc. Is is now unused, so remove it. Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Stefan Weil <weil@mail.berlios.de>
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Stefan Weil authored
Function gen_pc_load was introduced in commit d2856f1a. The only reason for parameter searched_pc was a debug statement in target-i386/translate.c. Parameter puc was needed by target-sparc until commit d7da2a10. Remove searched_pc from the debug statement and remove both parameters from the parameter list of gen_pc_load. As the function name gen_pc_load was also misleading, it is now called restore_state_to_opc. This new name was suggested by Peter Maydell, thanks. v2: Remove last parameter, too, and rename the function. v3: Fix [] typo in target-arm/translate.c. Fix wrong SHA1 object name in commit message (copy+paste error). Cc: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Stefan Weil <weil@mail.berlios.de>
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- Apr 17, 2011
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Aurelien Jarno authored
efstst*() functions are fast SPE funtions which do not take into account special values (infinites, NaN, etc.), while efscmp*() functions are IEEE754 compliant. Given that float32_*() functions are IEEE754 compliant, the efscmp*() functions are correctly implemented, while efstst*() are not. This patch reverse the implementation of this two groups of functions and fix the comments. It also use float32_eq() instead of float32_eq_quiet() as qNaNs should not be ignored. Cc: Alexander Graf <agraf@suse.de> Cc: Nathan Froyd <froydnj@codesourcery.com> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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Aurelien Jarno authored
float*_eq functions have a different semantics than other comparison functions. Fix that by first renaming float*_quiet() into float*_eq_quiet(). Note that it is purely mechanical, and the behaviour should be unchanged. That said it clearly highlight problems due to this different semantics, they are fixed later in this patch series. Cc: Alexander Graf <agraf@suse.de> Acked-by:
Edgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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- Apr 12, 2011
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Aurelien Jarno authored
Now that PPC defaults to softfloat which always provides float128 support, there is no need to keep two version of the code, depending if float128 support is available or not. Suggested by Peter Maydell. Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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- Apr 09, 2011
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Stefan Weil authored
tcg_gen_exit_tb takes a parameter of type tcg_target_long, so the type casts of pointer to long should be replaced by type casts of pointer to tcg_target_long (suggested by Blue Swirl). These changes are needed for build environments where sizeof(long) != sizeof(void *), especially for w64. Signed-off-by:
Stefan Weil <weil@mail.berlios.de> Signed-off-by:
Aurelien Jarno <aurelien@aurel32.net>
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