- Oct 20, 2017
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David Hildenbrand authored
This is a neat way to implement low address protection, whereby only the first 512 bytes of the first two pages (each 4096 bytes) of every address space are protected. Store a tec of 0 for the access exception, this is what is defined by Enhanced Suppression on Protection in case of a low address protection (Bit 61 set to 0, rest undefined). We have to make sure to to pass the access address, not the masked page address into mmu_translate*(). Drop the check from testblock. So we can properly test this via kvm-unit-tests. This will check every access going through one of the MMUs. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20171016202358.3633-3-david@redhat.com> [CH: restored error message for access register mode] Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Background: s390x implements Low-Address Protection (LAP). If LAP is enabled, writing to effective addresses (before any translation) 0-511 and 4096-4607 triggers a protection exception. So we have subpage protection on the first two pages of every address space (where the lowcore - the CPU private data resides). By immediately invalidating the write entry but allowing the caller to continue, we force every write access onto these first two pages into the slow path. we will get a tlb fault with the specific accessed addresses and can then evaluate if protection applies or not. We have to make sure to ignore the invalid bit if tlb_fill() succeeds. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20171016202358.3633-2-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Thomas Huth authored
These tests can easily be used on s390x, too. We just have to make sure to use the virtio-xxx-ccw devices instead of virtio-xxx-pci. Signed-off-by:
Thomas Huth <thuth@redhat.com> Message-Id: <1508336428-20511-3-git-send-email-thuth@redhat.com> Reviewed-by:
Eric Blake <eblake@redhat.com> Acked-by:
Michael S. Tsirkin <mst@redhat.com> Acked-by:
Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Eric Blake authored
We have several callers that were formatting the argument strings themselves; consolidate this effort by adding new convenience functions directly in libqtest, and update some call-sites that can benefit from it. Note that the new functions qtest_startf() and qtest_vstartf() behave more like qtest_init() (the caller must assign global_qtest after the fact, rather than getting it implicitly set). This helps us prepare for future patches that get rid of the global variable, by explicitly highlighting which tests still depend on it now. Signed-off-by:
Eric Blake <eblake@redhat.com> [thuth: Dropped the hunks that do not apply cleanly to qemu master yet and added the missing g_free(args) in qtest_vstartf()] Signed-off-by:
Thomas Huth <thuth@redhat.com> Message-Id: <1508336428-20511-2-git-send-email-thuth@redhat.com> Acked-by:
Michael S. Tsirkin <mst@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Halil Pasic authored
Simplify the error handling of the MSCH. Let the code detecting the condition tell (in a less ambiguous way) how it's to be handled. No changes in behavior. Signed-off-by:
Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-8-pasic@linux.vnet.ibm.com> [CH: fix return code for fctl != 0] Reviewed-by:
Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Halil Pasic authored
Simplify the error handling of the HSCH. Let the code detecting the condition tell (in a less ambiguous way) how it's to be handled. No changes in behavior. Signed-off-by:
Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-7-pasic@linux.vnet.ibm.com> Reviewed-by:
Thomas Huth <thuth@redhat.com> Reviewed-by:
Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Halil Pasic authored
Simplify the error handling of the CSCH. Let the code detecting the condition tell (in a less ambiguous way) how it's to be handled. No changes in behavior. Signed-off-by:
Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-6-pasic@linux.vnet.ibm.com> Reviewed-by:
Thomas Huth <thuth@redhat.com> Reviewed-by:
Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Halil Pasic authored
Simplify the error handling of the XSCH. Let the code detecting the condition tell (in a less ambiguous way) how it's to be handled. No changes in behavior. Signed-off-by:
Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-5-pasic@linux.vnet.ibm.com> Reviewed-by:
Thomas Huth <thuth@redhat.com> Reviewed-by:
Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Halil Pasic authored
Simplify the error handling of the SSCH and RSCH handler avoiding arbitrary and cryptic error codes being used to tell how the instruction is supposed to end. Let the code detecting the condition tell how it's to be handled in a less ambiguous way. It's best to handle SSCH and RSCH in one go as the emulation of the two shares a lot of code. For passthrough this change isn't pure refactoring, but changes the way kernel reported EFAULT is handled. After clarifying the kernel interface we decided that EFAULT shall be mapped to unit exception. Same goes for unexpected error codes and absence of required ORB flags. Signed-off-by:
Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-4-pasic@linux.vnet.ibm.com> Tested-by:
Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> [CH: cosmetic changes] Reviewed-by:
Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Halil Pasic authored
CSS code needs to tell the IO instruction handlers located in ioinst.c how the emulated instruction should be ended. Currently this is done by returning generic (POSIX) error codes, and mapping them to outcomes like condition codes. This makes bugs easy to create and hard to recognize. As a preparation for moving away from (mis)using generic error codes for flow control let us introduce a type which tells the instruction handler function how to end the instruction, in a more straight-forward and less ambiguous way. Signed-off-by:
Halil Pasic <pasic@linux.vnet.ibm.com> Message-Id: <20171017140453.51099-3-pasic@linux.vnet.ibm.com> Reviewed-by:
Thomas Huth <thuth@redhat.com> Reviewed-by:
Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com> [CH: cosmetic changes] Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Igor Mammedov authored
s390-virtio-ccw.c is the sole user of s390x_new_cpu(), so move this helper there. Signed-off-by:
Igor Mammedov <imammedo@redhat.com> Message-Id: <1508253203-119237-1-git-send-email-imammedo@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Igor Mammedov authored
object_new() returns cpu with refcnt == 1 and after realize refcnt == 2*. s390x_new_cpu() as an owner of the first refcnt should have released it on exit in both cases (on error and success) to avoid it leaking. Do so for both cases. Signed-off-by:
Igor Mammedov <imammedo@redhat.com> Message-Id: <1508247680-98800-2-git-send-email-imammedo@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Cornelia Huck authored
The architecture supports masks of variable length for sclp write event mask. We currently only support 4 byte event masks, as that is what Linux uses. Let's extend this to the maximum mask length supported by the architecture and return 0 to the guest for the mask bits we don't support in core. Initial patch by: Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by:
Cornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by:
Jason J. Herne <jjherne@linux.vnet.ibm.com> Message-Id: <1507729193-9747-1-git-send-email-jjherne@linux.vnet.ibm.com> Acked-by:
Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Cornelia Huck authored
There's a new qemu-s390x@nongnu.org mailing list: add it to the s390 sections. Reviewed-by:
Thomas Huth <thuth@redhat.com> Acked-by:
Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Farhan Ali authored
Wire up the virtio-input HID devices (keyboard, mouse, tablet) for the CCW bus. The virtio-input is a virtio-1 device, so disable legacy revision 0. Signed-off-by:
Farhan Ali <alifm@linux.vnet.ibm.com> Reviewed-by:
Halil Pasic <pasic@linux.vnet.ibm.com> Reviewed-by:
Christian Borntraeger <borntraeger@de.ibm.com> Message-Id: <6a8ea4c503ee32c2ca7fa608b5f2f547009be8ee.1507557166.git.alifm@linux.vnet.ibm.com> Reviewed-by:
Thomas Huth <thuth@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
When we try to start a CPU with a WAIT PSW, we have to take care that TCG will actually try to continue executing instructions. We must therefore really only unhalt the CPU if we don't have a WAIT PSW. Also document the special order for restart interrupts, which load a new PSW and change the state to operating. To keep KVM working, simply don't have a look at the WAIT bit when loading the PSW. Otherwise the behavior of a restart interrupt when a CPU stopped would be changed. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-31-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Refactor it to use s390_get_feat_block(). Directly write into the mapped lowcore with stfl and make sure it is really only compiled if needed. While at it, add an alignment check for STFLE and avoid potential_page_fault() by properly restoring the CPU state. Due to s390_get_feat_block(), we will now also indicate the "Configuration-z-architectural-mode", which is with new SIGP code the right thing to do. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-30-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Nothing hindering us anymore from unlocking the restart code (used for NMI). Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-29-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
As we properly implement it, allow to enable it. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-28-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
This effectively enables experimental SMP support. Floating interrupts are still a mess, so allow it but print a big warning. There also seems to be a problem with CPU hotplug (after the main loop started). Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-27-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> [CH: changed insn-data.def as pointed out by Richard] Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Thanks to Aurelien Jarno for doing this in his prototype. We can flush the whole TLB as this should happen really rarely. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-26-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Implement them like KVM implements/handles them. Both can only be triggered via SIGP instructions. RESET has (almost) the lowest priority if the CPU is running, and the highest if the CPU is STOPPED. This is handled in SIGP code already. On delivery, we only have to care about the "CPU running" scenario. STOP is defined to be delivered after all other interrupts have been delivered. Therefore it has the actual lowest priority. As both can wake up a CPU if sleeping, indicate them correctly to external code (e.g. cpu_has_work()). Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-25-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Mostly analogous to the kernel/KVM version (so I assume the checks are correct :) ). As a preparation for TCG. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-24-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
As preparation for TCG. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-23-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
As preparation for TCG. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-22-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Add it as preparation for TCG. Sensing could later be done completely lockless. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-21-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Preparation for TCG, for KVM is this is completely handled in the kernel. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-20-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
For KVM, the KVM module decides when a STOP can be performed (when the STOP interrupt can be processed). Factor it out so we can use it later for TCG. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-19-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
We want to use the same code base for TCG, so let's cleanly factor it out. The sigp mutex is currently not really needed, as everything is protected by the iothread mutex. But this could change later, so leave it in place and initialize it properly from common code. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-17-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Preparation for moving it out of kvm.c. Reviewed-by:
Thomas Huth <thuth@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-16-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Called from SIGP code to be factored out, so let's move it. Add a FIXME for TCG code in the future. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-15-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Factor it out into s390_store_status(), to be used also by TCG later on. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-14-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Preparation for factoring it out into !kvm code. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-13-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
No need to pass kvm_run. Pass parameters alphabetically ordered. Reviewed-by:
Thomas Huth <thuth@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-12-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
KVM handles the wait PSW itself and triggers a WAIT ICPT in case it really wants to sleep (disabled wait). This will later allow us to change the order of loading a restart interrupt and setting a CPU to OPERATING on SIGP RESTART without changing KVM behavior. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-11-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
If we encounter a WAIT PSW, we have to halt immediately. Using cpu_loop_exit() at this point feels wrong. Simply leaving cs->exception_index set doesn't result in an immediate stop. This is also necessary to properly handle SIGP STOP interrupts later. The CPU_INTERRUPT_HALT will be processed immediately and properly set the CPU to halted (also resetting cs->exception_index to EXCP_HLT) Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-10-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
This will now also detect crashes under TCG. We can directly use cpu->env.psw.addr instead of kvm_run, as we do a cpu_synchronize_state(). Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-9-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Going to OPERATING here looks wrong. A CPU should even never be !OPERATING at this point. Unhalting will already be done in cpu_handle_halt() if there is work, so we can drop this statement completely. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-8-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
Interrupts can't wake such CPUs up. SIGP from other CPUs has to be used to toggle the state. Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-7-david@redhat.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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David Hildenbrand authored
We can now let go of INTERRUPT_EXT. When cr0 changes, we have to revalidate if we now have a pending external interrupt, just like when the PSW (or SYSTEM MASK only) changes. Signed-off-by:
David Hildenbrand <david@redhat.com> Message-Id: <20170928203708.9376-6-david@redhat.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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