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  1. Mar 20, 2023
  3. Mar 17, 2023
    • Peter Maydell's avatar
      Merge tag 'trivial-branch-for-8.0-pull-request' of... · 74c581b6
      Peter Maydell authored 
      Merge tag 'trivial-branch-for-8.0-pull-request' of https://gitlab.com/laurent_vivier/qemu into staging

Trivial branch pull request 20230317

Fix doc
Fix sh4 cpu log output

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# gpg: Signature made Fri 17 Mar 2023 14:17:48 GMT
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* tag 'trivial-branch-for-8.0-pull-request' of https://gitlab.com/laurent_vivier/qemu

:
  docs/sphinx/kerneldoc.py: Honour --enable-werror
  target/sh4: Honor QEMU_LOG_FILENAME with QEMU_LOG=cpu
  exec/memory: Fix kernel-doc warning

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      74c581b6
    • Peter Maydell's avatar
      Merge tag '20230316-xtensa' of https://github.com/OSLL/qemu-xtensa into staging · ff7b2b09
      Peter Maydell authored 
      target/xtensa updates for v8.0:

- enable testing big-endian xtensa cores

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# gpg: Signature made Thu 16 Mar 2023 20:10:16 GMT
# gpg:                using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044
# gpg:                issuer "jcmvbkbc@gmail.com"
# gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown]
# gpg:                 aka "Max Filippov <max.filippov@cogentembedded.com>" [full]
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>" [full]
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* tag '20230316-xtensa' of https://github.com/OSLL/qemu-xtensa

:
  tests/tcg/xtensa: allow testing big-endian cores
  tests/tcg/xtensa: add linker.ld to CLEANFILES

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      ff7b2b09
  5. Mar 16, 2023
  7. Mar 15, 2023
    • Peter Maydell's avatar
      Merge tag 'misc-next-pull-request' of https://gitlab.com/berrange/qemu into staging · 9636e513
      Peter Maydell authored 
      Miscellaneous fixes

 * Avoid memory leak in TLS GSource usage
 * Avoid sending key releases for lang1/lang2 keys in ps2 keyboard
 * Add missing key name constants for F13-F24 keys

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# gpg: Signature made Tue 14 Mar 2023 16:25:28 GMT
# gpg:                using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104FDF
# gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [full]
# gpg:                 aka "Daniel P. Berrange <berrange@redhat.com>" [full]
# Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E  8E3F BE86 EBB4 1510 4FDF

* tag 'misc-next-pull-request' of https://gitlab.com/berrange/qemu

:
  io/channel-tls: plug memory leakage on GSource
  ps2: Don't send key release event for Lang1, Lang2 keys
  Add qemu qcode support for keys F13 to F24

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      9636e513
    • Peter Maydell's avatar
      Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging · be4033d7
      Peter Maydell authored 
      small bug fixes

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# gpg: Signature made Wed 15 Mar 2023 10:52:33 GMT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu

:
  vl: defuse PID file path resolve error
  hw/intc/ioapic: Update KVM routes before redelivering IRQ, on RTE update
  docs/devel: clarify further the semantics of RMW operations
  Fix build without CONFIG_XEN_EMU

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
      be4033d7
    • Max Filippov's avatar
      tests/tcg/xtensa: allow testing big-endian cores · 51139fb3
      Max Filippov authored 
      
Don't disable all big-endian tests, instead check whether $(CORE) is
supported by the configured $(QEMU) and enable tests if it is.

Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
Reviewed-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
      51139fb3
    • Max Filippov's avatar
      tests/tcg/xtensa: add linker.ld to CLEANFILES · 5161dba8
      Max Filippov authored 
      
Linker script for xtensa tests must be preprocessed for a specific
target, remove it as a part of make clean.

Fixes: be5cac17 ("tests/tcg/xtensa: enable system tests")
Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
Reviewed-by: default avatarWilfred Mallawa <wilfred.mallawa@wdc.com>
Reviewed-by: default avatarPhilippe Mathieu-Daudé <philmd@linaro.org>
      5161dba8
    • Fiona Ebner's avatar
      vl: defuse PID file path resolve error · dee2a4d4
      Fiona Ebner authored 
      
Commit 85c4bf8a ("vl: Unlink absolute PID file path") introduced a
critical error when the PID file path cannot be resolved. Before this
commit, it was possible to invoke QEMU when the PID file was a file
created with mkstemp that was already unlinked at the time of the
invocation. There might be other similar scenarios.

It should not be a critical error when the PID file unlink notifier
can't be registered, because the path can't be resolved. If the file
is already gone from QEMU's perspective, silently ignore the error.
Otherwise, only print a warning.

Fixes: 85c4bf8a ("vl: Unlink absolute PID file path")
Reported-by: default avatarDominik Csapak <d.csapak@proxmox.com>
Suggested-by: default avatarThomas Lamprecht <t.lamprecht@proxmox.com>
Signed-off-by: default avatarFiona Ebner <f.ebner@proxmox.com>
Reviewed-by: default avatarHanna Reitz <hreitz@redhat.com>
Message-Id: <20221031094716.39786-1-f.ebner@proxmox.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      dee2a4d4
    • David Woodhouse's avatar
      hw/intc/ioapic: Update KVM routes before redelivering IRQ, on RTE update · 54ad31fb
      David Woodhouse authored 
      
A Linux guest will perform IRQ migration after the IRQ has happened,
updating the RTE to point to the new destination CPU and then unmasking
the interrupt.

However, when the guest updates the RTE, ioapic_mem_write() calls
ioapic_service(), which redelivers the pending level interrupt via
kvm_set_irq(), *before* calling ioapic_update_kvm_routes() which sets
the new target CPU.

Thus, the IRQ which is supposed to go to the new target CPU is instead
misdelivered to the previous target. An example where the guest kernel
is attempting to migrate from CPU#2 to CPU#0 shows:

xenstore_read tx 0 path control/platform-feature-xs_reset_watches
ioapic_set_irq vector: 11 level: 1
ioapic_set_remote_irr set remote irr for pin 11
ioapic_service: trigger KVM IRQ 11
[    0.523627] The affinity mask was 0-3 and the handler is on 2
ioapic_mem_write ioapic mem write addr 0x0 regsel: 0x27 size 0x4 val 0x26
ioapic_update_kvm_routes: update KVM route for IRQ 11: fee02000 8021
ioapic_mem_write ioapic mem write addr 0x10 regsel: 0x26 size 0x4 val 0x18021
xenstore_reset_watches
ioapic_set_irq vector: 11 level: 1
ioapic_mem_read ioapic mem read addr 0x10 regsel: 0x26 size 0x4 retval 0x1c021
[    0.524569] ioapic_ack_level IRQ 11 moveit = 1
ioapic_eoi_broadcast EOI broadcast for vector 33
ioapic_clear_remote_irr clear remote irr for pin 11 vector 33
ioapic_mem_write ioapic mem write addr 0x0 regsel: 0x26 size 0x4 val 0x26
ioapic_mem_read ioapic mem read addr 0x10 regsel: 0x26 size 0x4 retval 0x18021
[    0.525235] ioapic_finish_move IRQ 11 calls irq_move_masked_irq()
[    0.526147] irq_do_set_affinity for IRQ 11, 0
[    0.526732] ioapic_set_affinity for IRQ 11, 0
[    0.527330] ioapic_setup_msg_from_msi for IRQ11 target 0
ioapic_mem_write ioapic mem write addr 0x0 regsel: 0x26 size 0x4 val 0x27
ioapic_mem_write ioapic mem write addr 0x10 regsel: 0x27 size 0x4 val 0x0
ioapic_mem_write ioapic mem write addr 0x0 regsel: 0x27 size 0x4 val 0x26
ioapic_mem_write ioapic mem write addr 0x10 regsel: 0x26 size 0x4 val 0x18021
[    0.527623] ioapic_set_affinity returns 0
[    0.527623] ioapic_finish_move IRQ 11 calls unmask_ioapic_irq()
ioapic_mem_write ioapic mem write addr 0x0 regsel: 0x26 size 0x4 val 0x26
ioapic_mem_write ioapic mem write addr 0x10 regsel: 0x26 size 0x4 val 0x8021
ioapic_set_remote_irr set remote irr for pin 11
ioapic_service: trigger KVM IRQ 11
ioapic_update_kvm_routes: update KVM route for IRQ 11: fee00000 8021
[    0.529571] The affinity mask was 0 and the handler is on 2
[    xenstore_watch path memory/target token FFFFFFFF92847D40

There are no other code paths in ioapic_mem_write() which need the KVM
IRQ routing table to be updated, so just shift the call from the end
of the function to happen right before the call to ioapic_service()
and thus deliver the re-enabled IRQ to the right place.

Alternative fixes might have been just to remove the part in
ioapic_service() which delivers the IRQ via kvm_set_irq() because
surely delivering as MSI ought to work just fine anyway in all cases?
That code lacks a comment justifying its existence.

Or maybe in the specific case shown in the above log, it would have
sufficed for ioapic_update_kvm_routes() to update the route *even*
when the IRQ is masked. It's not like it's actually going to get
triggered unless QEMU deliberately does so, anyway? But that only
works because the target CPU happens to be in the high word of the
RTE; if something in the *low* word (vector, perhaps) was changed
at the same time as the unmask, we'd still trigger with stale data.

Fixes: 15eafc2e "kvm: x86: add support for KVM_CAP_SPLIT_IRQCHIP"
Signed-off-by: default avatarDavid Woodhouse <dwmw2@infradead.org>
Reviewed-by: default avatarPeter Xu <peterx@redhat.com>
Message-Id: <20230308111952.2728440-2-dwmw2@infradead.org>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      54ad31fb
    • Paolo Bonzini's avatar
      docs/devel: clarify further the semantics of RMW operations · 3b31669e
      Paolo Bonzini authored 
      
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      3b31669e