- Jan 06, 2021
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Peter Maydell authored
Switch the bamboo board to directly creating and configuring the UIC, rather than doing it via the old ppcuic_init() helper function. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201212001537.24520-5-peter.maydell@linaro.org> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Peter Maydell authored
Switch the virtex_ml507 board to directly creating and configuring the UIC, rather than doing it via the old ppcuic_init() helper function. This fixes a trivial Coverity-detected memory leak where we were leaking the array of IRQs returned by ppcuic_init(). Fixes: Coverity CID 1421992 Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201212001537.24520-4-peter.maydell@linaro.org> Reviewed-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Peter Maydell authored
Currently the PPC UIC ("Universal Interrupt Controller") is implemented as a non-QOM device in ppc4xx_devs.c. Convert it to a proper QOM device in hw/intc. The ppcuic_init() function is retained for the moment with its current interface; in subsequent commits this will be tidied up to avoid the allocation of an irq array. This conversion adds VMState support. It leaves the LOG_UIC() macro as-is to maximise the extent to which this is simply code-movement rather than a rewrite (in new code it would be better to use tracepoints). The default property values for dcr-base and use-vectors are set to match those use by most of our boards with a UIC. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201212001537.24520-3-peter.maydell@linaro.org> Reviewed-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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Peter Maydell authored
In a following commit we will move the PPC UIC implementation to its own file in hw/intc. To prevent checkpatch complaining about that code-motion, fix up the minor style issues first. Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201212001537.24520-2-peter.maydell@linaro.org> Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by:
Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by:
Thomas Huth <thuth@redhat.com> Signed-off-by:
David Gibson <david@gibson.dropbear.id.au>
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- Dec 21, 2020
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Matthew Rosato authored
In pcistb_service_handler, a call is made to validate that the memory region can be accessed. However, the call is made using the entire length of the pcistb operation, which can be larger than the allowed memory access size (8). Since we already know that the provided buffer is a multiple of 8, fix the call to memory_region_access_valid to iterate over the memory region in the same way as the subsequent call to memory_region_dispatch_write. Fixes: 863f6f52 ("s390: implement pci instructions") Signed-off-by:
Matthew Rosato <mjrosato@linux.ibm.com> Reviewed-by:
Thomas Huth <thuth@redhat.com> Acked-by:
Pierre Morel <pmorel@linux.ibm.com> Message-Id: <1608243397-29428-3-git-send-email-mjrosato@linux.ibm.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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Matthew Rosato authored
In pcistb_service_call, we are grabbing 8 bits from a guest register to indicate the length of the store operation -- but per the architecture the length is actually defined by 13 bits of the guest register. Fixes: 863f6f52 ("s390: implement pci instructions") Signed-off-by:
Matthew Rosato <mjrosato@linux.ibm.com> Reviewed-by:
Pierre Morel <pmorel@linux.ibm.com> Reviewed-by:
Christian Borntraeger <borntraeger@de.ibm.com> Message-Id: <1608243397-29428-2-git-send-email-mjrosato@linux.ibm.com> Signed-off-by:
Cornelia Huck <cohuck@redhat.com>
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- Dec 19, 2020
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Markus Armbruster authored
Commit 8118f095 "migration: Append JSON description of migration stream" needs a JSON writer. The existing qobject_to_json() wasn't a good fit, because it requires building a QObject to convert. Instead, migration got its very own JSON writer, in commit 190c882c "QJSON: Add JSON writer". It tacitly limits numbers to int64_t, and strings contents to characters that don't need escaping, unlike qobject_to_json(). The previous commit factored the JSON writer out of qobject_to_json(). Replace migration's JSON writer by it. Cc: Juan Quintela <quintela@redhat.com> Cc: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by:
Markus Armbruster <armbru@redhat.com> Message-Id: <20201211171152.146877-17-armbru@redhat.com> Reviewed-by:
Dr. David Alan Gilbert <dgilbert@redhat.com>
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Markus Armbruster authored
RdmaProtectedQList provides a thread-safe queue of int64_t on top of a QList. rdma_protected_qlist_destroy() calls qlist_destroy_obj() directly. qlist_destroy_obj() is actually for use by qobject_destroy() only. The next commit will make that obvious. The minimal fix would be calling qobject_unref() instead. But QList is actually a bad fit here. It's designed for representing JSON arrays. We're better off with a GQueue here. Replace. Cc: Yuval Shaia <yuval.shaia.ml@gmail.com> Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Signed-off-by:
Markus Armbruster <armbru@redhat.com> Message-Id: <20201211171152.146877-8-armbru@redhat.com>
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Eric Blake authored
Anywhere we create a list of just one item or by prepending items (typically because order doesn't matter), we can use QAPI_LIST_PREPEND(). But places where we must keep the list in order by appending remain open-coded until later patches. Note that as a side effect, this also performs a cleanup of two minor issues in qga/commands-posix.c: the old code was performing new = g_malloc0(sizeof(*ret)); which 1) is confusing because you have to verify whether 'new' and 'ret' are variables with the same type, and 2) would conflict with C++ compilation (not an actual problem for this file, but makes copy-and-paste harder). Signed-off-by:
Eric Blake <eblake@redhat.com> Message-Id: <20201113011340.463563-5-eblake@redhat.com> Reviewed-by:
Markus Armbruster <armbru@redhat.com> Acked-by:
Stefan Hajnoczi <stefanha@redhat.com> [Straightforward conflicts due to commit a8aa94b5 "qga: update schema for guest-get-disks 'dependents' field" and commit a10b453a "target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c" resolved. Commit message tweaked.] Signed-off-by:
Markus Armbruster <armbru@redhat.com>
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Eric Blake authored
Instead of modifying the value member of a list element passed as a parameter, and open-coding the manipulation of that list, it's nicer to just return a freshly allocated value to be prepended to a list using QAPI_LIST_PREPEND. Signed-off-by:
Eric Blake <eblake@redhat.com> Message-Id: <20201113011340.463563-3-eblake@redhat.com> Reviewed-by:
Markus Armbruster <armbru@redhat.com> Signed-off-by:
Markus Armbruster <armbru@redhat.com>
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- Dec 18, 2020
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Eduardo Habkost authored
We're just doing pointer math with the device pointer, we can simply use obj instead. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Reviewed-by:
Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by:
Igor Mammedov <imammedo@redhat.com> Message-Id: <20201211220529.2290218-32-ehabkost@redhat.com> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost authored
The function will be moved to common QOM code, as it is not specific to TYPE_DEVICE anymore. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Reviewed-by:
Stefan Berger <stefanb@linux.ibm.com> Reviewed-by:
Cornelia Huck <cohuck@redhat.com> Reviewed-by:
Igor Mammedov <imammedo@redhat.com> Acked-by:
Paul Durrant <paul@xen.org> Message-Id: <20201211220529.2290218-31-ehabkost@redhat.com> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost authored
Move the variable declaration close to the macro that uses it. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Reviewed-by:
Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by:
Stefan Berger <stefanb@linux.ibm.com> Reviewed-by:
Igor Mammedov <imammedo@redhat.com> Message-Id: <20201211220529.2290218-29-ehabkost@redhat.com> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost authored
Support Property.set_default and PropertyInfo.description even if PropertyInfo.create is set. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Reviewed-by:
Igor Mammedov <imammedo@redhat.com> Message-Id: <20201211220529.2290218-26-ehabkost@redhat.com> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost authored
Returning ObjectProperty* will be useful for new property registration code that will add additional callbacks to ObjectProperty after registering it. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Reviewed-by:
Igor Mammedov <imammedo@redhat.com> Message-Id: <20201211220529.2290218-25-ehabkost@redhat.com> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost authored
Every single qdev property setter function manually checks dev->realized. We can just check dev->realized inside qdev_property_set() instead. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Reviewed-by:
Stefan Berger <stefanb@linux.ibm.com> Reviewed-by:
Cornelia Huck <cohuck@redhat.com> Reviewed-by:
Igor Mammedov <imammedo@redhat.com> Acked-by:
Paul Durrant <paul@xen.org> Message-Id: <20201211220529.2290218-24-ehabkost@redhat.com> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost authored
We'll add extra code to the qdev property getters and setters, so add wrapper functions where additional actions can be performed. The new functions have a "field_prop_" prefix instead of "qdev_" because the code will eventually be moved outside qdev-properties.c, to common QOM code. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Reviewed-by:
Igor Mammedov <imammedo@redhat.com> Message-Id: <20201211220529.2290218-23-ehabkost@redhat.com> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost authored
This will make it easier to remove the Property.name field in the future. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Reviewed-by:
Igor Mammedov <imammedo@redhat.com> Message-Id: <20201211220529.2290218-22-ehabkost@redhat.com> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost authored
This will make it easier to remove Property.name in the future. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20201211220529.2290218-21-ehabkost@redhat.com> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost authored
We already get the property name as argument to the property getter and setters, we don't need to use prop->name. This will make it easier to remove the Property.name field in the future. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Reviewed-by:
Stefan Berger <stefanb@linux.ibm.com> Reviewed-by:
Igor Mammedov <imammedo@redhat.com> Message-Id: <20201211220529.2290218-20-ehabkost@redhat.com> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost authored
Replace `Property *prop` parameter with `char *name`, to reduce dependency of getter and setter functions on the Property struct (which will be changed in following patches). Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Reviewed-by:
Igor Mammedov <imammedo@redhat.com> Reviewed-by:
Cornelia Huck <cohuck@redhat.com> Message-Id: <20201211220529.2290218-19-ehabkost@redhat.com> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Eduardo Habkost authored
Move the property types and property macros implemented in qdev-properties-system.c to a new qdev-properties-system.h header. Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com> Reviewed-by:
Igor Mammedov <imammedo@redhat.com> Message-Id: <20201211220529.2290218-16-ehabkost@redhat.com> Signed-off-by:
Eduardo Habkost <ehabkost@redhat.com>
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Philippe Mathieu-Daudé authored
This is the QEMU equivalent of this Linux commit (but 7 years later): https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=f7025a43a9da2 The MTD subsystem has its own small museum of ancient NANDs in a form of the CONFIG_MTD_NAND_MUSEUM_IDS configuration option. The museum contains stone age NANDs with 256 bytes pages, as well as iron age NANDs with 512 bytes per page and up to 8MiB page size. It is with great sorrow that I inform you that the museum is being decommissioned. The MTD subsystem is out of budget for Kconfig options and already has too many of them, and there is a general kernel trend to simplify the configuration menu. We remove the stone age exhibits along with closing the museum, but some of the iron age ones are transferred to the regular NAND depot. Namely, only those which have unique device IDs are transferred, and the ones which have conflicting device IDs are removed. The machine using this device are: - axis-dev88 - tosa (via tc6393xb_init) - spitz based (akita, borzoi, terrier) Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201214002620.342384-1-f4bug@amsat.org> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Signed-off-by:
Kevin Wolf <kwolf@redhat.com>
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Philippe Mathieu-Daudé authored
Add missing 'break' to fix: hw/rtc/twl92230.c: In function ‘menelaus_write’: hw/rtc/twl92230.c:713:5: error: label at end of compound statement 713 | default: | ^~~~~~~ Signed-off-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Thomas Huth <thuth@redhat.com> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201211154605.511714-1-f4bug@amsat.org> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Chen Qun authored
When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: hw/intc/arm_gicv3_kvm.c: In function ‘kvm_arm_gicv3_put’: hw/intc/arm_gicv3_kvm.c:484:13: warning: this statement may fall through [-Wimplicit-fallthrough=] kvm_gicc_access(s, ICC_AP0R_EL1(1), ncpu, ®64, true); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ hw/intc/arm_gicv3_kvm.c:485:9: note: here default: ^~~~~~~ hw/intc/arm_gicv3_kvm.c:495:13: warning: this statement may fall through [-Wimplicit-fallthrough=] kvm_gicc_access(s, ICC_AP1R_EL1(2), ncpu, ®64, true); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ hw/intc/arm_gicv3_kvm.c:496:9: note: here case 6: ^~~~ hw/intc/arm_gicv3_kvm.c:498:13: warning: this statement may fall through [-Wimplicit-fallthrough=] kvm_gicc_access(s, ICC_AP1R_EL1(1), ncpu, ®64, true); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ hw/intc/arm_gicv3_kvm.c:499:9: note: here default: ^~~~~~~ hw/intc/arm_gicv3_kvm.c: In function ‘kvm_arm_gicv3_get’: hw/intc/arm_gicv3_kvm.c:634:37: warning: this statement may fall through [-Wimplicit-fallthrough=] c->icc_apr[GICV3_G0][2] = reg64; ~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~ hw/intc/arm_gicv3_kvm.c:635:9: note: here case 6: ^~~~ hw/intc/arm_gicv3_kvm.c:637:37: warning: this statement may fall through [-Wimplicit-fallthrough=] c->icc_apr[GICV3_G0][1] = reg64; ~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~ hw/intc/arm_gicv3_kvm.c:638:9: note: here default: ^~~~~~~ hw/intc/arm_gicv3_kvm.c:648:39: warning: this statement may fall through [-Wimplicit-fallthrough=] c->icc_apr[GICV3_G1NS][2] = reg64; ~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~ hw/intc/arm_gicv3_kvm.c:649:9: note: here case 6: ^~~~ hw/intc/arm_gicv3_kvm.c:651:39: warning: this statement may fall through [-Wimplicit-fallthrough=] c->icc_apr[GICV3_G1NS][1] = reg64; ~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~ hw/intc/arm_gicv3_kvm.c:652:9: note: here default: ^~~~~~~ Reported-by:
Euler Robot <euler.robot@huawei.com> Signed-off-by:
Chen Qun <kuhn.chenqun@huawei.com> Signed-off-by:
Thomas Huth <thuth@redhat.com> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201211152426.350966-7-thuth@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Chen Qun authored
When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: ../hw/timer/renesas_tmr.c: In function ‘tmr_read’: ../hw/timer/renesas_tmr.c:221:19: warning: this statement may fall through [-Wimplicit-fallthrough=] 221 | } else if (ch == 0) {i | ^ ../hw/timer/renesas_tmr.c:224:5: note: here 224 | case A_TCORB: | ^~~~ Add the corresponding "fall through" comment to fix it. Reported-by:
Euler Robot <euler.robot@huawei.com> Signed-off-by:
Chen Qun <kuhn.chenqun@huawei.com> Signed-off-by:
Thomas Huth <thuth@redhat.com> Message-Id: <20201211152426.350966-5-thuth@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Thomas Huth authored
When compiling with -Werror=implicit-fallthrough, gcc complains about missing fallthrough annotations in this file. Looking at the code, the fallthrough is indeed wanted here, but instead of adding the annotations, it can be done more efficiently by simply calculating the offset with a subtraction instead of increasing a local variable one by one. Signed-off-by:
Thomas Huth <thuth@redhat.com> Reviewed-by:
Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201211152426.350966-4-thuth@redhat.com> Signed-off-by:
Thomas Huth <thuth@redhat.com>
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Alistair Francis authored
OpenTitan is currently only avalible on an FPGA platform and the memory addresses have changed. Update to use the new memory addresses. Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Message-id: 8eb65314830a75d0fea3fccf77bc45b8ddd01c42.1607982831.git.alistair.francis@wdc.com
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Alistair Francis authored
Instead of using string compares to determine if a RISC-V machine is using 32-bit or 64-bit CPUs we can use the initalised CPUs. This avoids us having to maintain a list of CPU names to compare against. This commit also fixes the name of the function to match the riscv_cpu_is_32bit() function. Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-id: 8ab7614e5df93ab5267788b73dcd75f9f5615e82.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Message-id: 40d6df4dd05302c566e419be3a1fef7799e57c2e.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: ac75037dd58061486de421a0fcd9ac8a92014607.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: d7ca1aca672515e6a4aa0d41716238b055f3f25c.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 51e9842dbed1acceebad7f97bd3aae69aa1ac19e.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: aed1174c2efd2f050fa5bd8f524d68795b12c0e4.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 04ac7fba2348c92f296a5e6a9959ac72b77ae4c6.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Currently the riscv_is_32_bit() function only supports the generic rv32 CPUs. Extend the function to support the SiFive and LowRISC CPUs as well. Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Palmer Dabbelt <palmerdabbelt@google.com> Acked-by:
Palmer Dabbelt <palmerdabbelt@google.com> Message-id: 9a13764115ba78688ba61b56526c6de65fc3ef42.1608142916.git.alistair.francis@wdc.com
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Alistair Francis authored
Previously if an interrupt occured during the claim process (after the interrupt is claimed but before it's completed) it would never be cleared. This patch ensures that we also clear the hidden_pending bits as well. Signed-off-by:
Alistair Francis <alistair.francis@wdc.com> Tested-by:
Jackie Ke <jackieke724@hotmail.com> Message-id: 4e9786084a86f220689123cc8a7837af8fa071cf.1607100423.git.alistair.francis@wdc.com
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Xinhao Zhang authored
Fix code style. Don't use '#' flag of printf format ('%#') in format strings, use '0x' prefix instead Signed-off-by:
Xinhao Zhang <zhangxinhao1@huawei.com> Signed-off-by:
Kai Deng <dengkai1@huawei.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com> Message-id: 20201116140148.2850128-1-zhangxinhao1@huawei.com Signed-off-by:
Alistair Francis <alistair.francis@wdc.com>
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Vitaly Wool authored
Add QSPI NOR flash definition for Microchip PolarFire SoC. Signed-off-by:
Vitaly Wool <vitaly.wool@konsulko.com> Acked-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Message-id: 20201112074950.33283-1-vitaly.wool@konsulko.com Signed-off-by:
Alistair Francis <alistair.francis@wdc.com>
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Anup Patel authored
The sifive_u machine emulates two UARTs but we have only UART0 DT node in the generated DTB so this patch adds UART1 DT node in the generated DTB. Signed-off-by:
Anup Patel <anup.patel@wdc.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com> Message-id: 20201111094725.3768755-1-anup.patel@wdc.com Signed-off-by:
Alistair Francis <alistair.francis@wdc.com>
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