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Commit bcda710f authored by Hao Wu's avatar Hao Wu Committed by Peter Maydell
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hw/misc: Add clock converter in NPCM7XX CLK module


This patch allows NPCM7XX CLK module to compute clocks that are used by
other NPCM7XX modules.

Add a new struct NPCM7xxClockConverterState which represents a
single converter.  Each clock converter in CLK module represents one
converter in NPCM7XX CLK Module(PLL, SEL or Divider). Each converter
takes one or more input clocks and converts them into one output clock.
They form a clock hierarchy in the CLK module and are responsible for
outputing clocks for various other modules in an NPCM7XX SoC.

Each converter has a function pointer called "convert" which represents
the unique logic for that converter.

The clock contains two initialization information: ConverterInitInfo and
ConverterConnectionInfo. They represent the vertices and edges in the
clock diagram respectively.

Reviewed-by: default avatarHavard Skinnemoen <hskinnemoen@google.com>
Reviewed-by: default avatarTyrone Ting <kfting@nuvoton.com>
Signed-off-by: default avatarHao Wu <wuhaotsh@google.com>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Message-id: 20210108190945.949196-2-wuhaotsh@google.com
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 5cab6d5a
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