Merge tag 'pull-tcg-20231023' of https://gitlab.com/rth7680/qemu into staging
tcg: Drop unused tcg_temp_free define tcg: Introduce tcg_use_softmmu tcg: Optimize past conditional branches tcg: Use constant zero when expanding with divu2 tcg: Add negsetcondi tcg: Define MO_TL tcg: Export tcg_gen_ext_{i32,i64,tl} target/*: Use tcg_gen_ext_* tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB tcg/ppc: Use ADDPCIS for power9 tcg/ppc: Use prefixed instructions for power10 tcg/ppc: Disable TCG_REG_TB for Power9/Power10 tcg/ppc: Enable direct branching tcg_out_goto_tb with TCG_REG_TB tcg/ppc: Use ADDPCIS for power9 tcg/ppc: Use prefixed instructions for power10 tcg/ppc: Disable TCG_REG_TB for Power9/Power10 # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmU2t18dHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV9uXQgAhT1mDy5sg7mfSWuc # X7i54C3n6Ykyra0HDG47dt4G0gkACEs7tDkllHIxhqTPKCrzpevyZEoyigr2MEOa # 3GCwxvJORb27Ql2aiM1K8cdlEbzcrx+RZbl4lwqZpZbmMUbz/ZQI4xPEAf2yKdfB # jTzi+Iu6ziPVqVQrg6fTm1I7YgQI85qcfKxi5lBaXgSfxPXGSlLeDw9Y8QjLHXRx # nSiGpWiUd5TkqZgLIctShDbK4NEHcvjXUTW4rMWU9l5Cjdf9ZIhxcCxgKTXtOxBi # 9tUdGOiup2HudOFf+DpQorzWpwRwy3NGpUF7n+WmevQZ1Qh8uNKsveFB0uuqObLg # zlTI2Q== # =lgiT # -----END PGP SIGNATURE----- # gpg: Signature made Mon 23 Oct 2023 11:11:43 PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20231023' of https://gitlab.com/rth7680/qemu : (38 commits) target/xtensa: Use tcg_gen_sextract_i32 target/tricore: Use tcg_gen_*extract_tl target/rx: Use tcg_gen_ext_i32 target/m68k: Use tcg_gen_ext_i32 target/i386: Use tcg_gen_ext_tl target/arm: Use tcg_gen_ext_i64 tcg: Define MO_TL tcg: Export tcg_gen_ext_{i32,i64,tl} tcg: add negsetcondi target/i386: Use i128 for 128 and 256-bit loads and stores tcg: Add tcg_gen_{ld,st}_i128 tcg: Optimize past conditional branches tcg: Use constant zero when expanding with divu2 tcg: drop unused tcg_temp_free define tcg/s390x: Use tcg_use_softmmu tcg/riscv: Use tcg_use_softmmu tcg/riscv: Do not reserve TCG_GUEST_BASE_REG for guest_base zero tcg/ppc: Use tcg_use_softmmu tcg/mips: Use tcg_use_softmmu tcg/loongarch64: Use tcg_use_softmmu ... Signed-off-by:Stefan Hajnoczi <stefanha@redhat.com>
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- include/exec/target_long.h 2 additions, 0 deletionsinclude/exec/target_long.h
- include/tcg/tcg-op-common.h 9 additions, 0 deletionsinclude/tcg/tcg-op-common.h
- include/tcg/tcg-op.h 4 additions, 2 deletionsinclude/tcg/tcg-op.h
- include/tcg/tcg.h 6 additions, 2 deletionsinclude/tcg/tcg.h
- target/arm/tcg/translate-a64.c 2 additions, 35 deletionstarget/arm/tcg/translate-a64.c
- target/i386/tcg/translate.c 32 additions, 59 deletionstarget/i386/tcg/translate.c
- target/m68k/translate.c 3 additions, 20 deletionstarget/m68k/translate.c
- target/rx/translate.c 3 additions, 8 deletionstarget/rx/translate.c
- target/tricore/translate.c 4 additions, 16 deletionstarget/tricore/translate.c
- target/xtensa/translate.c 1 addition, 11 deletionstarget/xtensa/translate.c
- tcg/aarch64/tcg-target.c.inc 87 additions, 88 deletionstcg/aarch64/tcg-target.c.inc
- tcg/arm/tcg-target.c.inc 100 additions, 109 deletionstcg/arm/tcg-target.c.inc
- tcg/i386/tcg-target.c.inc 99 additions, 101 deletionstcg/i386/tcg-target.c.inc
- tcg/loongarch64/tcg-target.c.inc 61 additions, 65 deletionstcg/loongarch64/tcg-target.c.inc
- tcg/mips/tcg-target.c.inc 105 additions, 110 deletionstcg/mips/tcg-target.c.inc
- tcg/optimize.c 5 additions, 3 deletionstcg/optimize.c
- tcg/ppc/tcg-target.c.inc 365 additions, 168 deletionstcg/ppc/tcg-target.c.inc
- tcg/riscv/tcg-target.c.inc 93 additions, 88 deletionstcg/riscv/tcg-target.c.inc
- tcg/s390x/tcg-target.c.inc 77 additions, 80 deletionstcg/s390x/tcg-target.c.inc
- tcg/tcg-op-ldst.c 17 additions, 11 deletionstcg/tcg-op-ldst.c
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