Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210525' into staging
target-arm queue:
* Implement SVE2 emulation
* Implement integer matrix multiply accumulate
* Implement FEAT_TLBIOS
* Implement FEAT_TLBRANGE
* disas/libvixl: Protect C system header for C++ compiler
* Use correct SP in M-profile exception return
* AN524, AN547: Correct modelling of internal SRAMs
* hw/intc/arm_gicv3_cpuif: Fix EOIR write access check logic
* hw/arm/smmuv3: Another range invalidation fix
# gpg: Signature made Tue 25 May 2021 16:02:25 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210525: (114 commits)
target/arm: Enable SVE2 and related extensions
linux-user/aarch64: Enable hwcap bits for sve2 and related extensions
target/arm: Implement integer matrix multiply accumulate
target/arm: Implement aarch32 VSUDOT, VUSDOT
target/arm: Split decode of VSDOT and VUDOT
target/arm: Split out do_neon_ddda
target/arm: Fix decode for VDOT (indexed)
target/arm: Remove unused fpst from VDOT_scalar
target/arm: Split out do_neon_ddda_fpst
target/arm: Implement aarch64 SUDOT, USDOT
target/arm: Implement SVE2 fp multiply-add long
target/arm: Move endian adjustment macros to vec_internal.h
target/arm: Implement SVE2 bitwise shift immediate
target/arm: Implement 128-bit ZIP, UZP, TRN
target/arm: Implement SVE2 LD1RO
target/arm: Tidy do_ldrq
target/arm: Share table of sve load functions
target/arm: Implement SVE2 FLOGB
target/arm: Implement SVE2 FCVTXNT, FCVTX
target/arm: Implement SVE2 FCVTLT
...
Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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- accel/tcg/cputlb.c 114 additions, 117 deletionsaccel/tcg/cputlb.c
- disas/libvixl/vixl/code-buffer.h 1 addition, 1 deletiondisas/libvixl/vixl/code-buffer.h
- disas/libvixl/vixl/globals.h 9 additions, 7 deletionsdisas/libvixl/vixl/globals.h
- disas/libvixl/vixl/invalset.h 1 addition, 1 deletiondisas/libvixl/vixl/invalset.h
- disas/libvixl/vixl/platform.h 2 additions, 0 deletionsdisas/libvixl/vixl/platform.h
- disas/libvixl/vixl/utils.cc 1 addition, 1 deletiondisas/libvixl/vixl/utils.cc
- disas/libvixl/vixl/utils.h 1 addition, 1 deletiondisas/libvixl/vixl/utils.h
- hw/arm/armsse.c 29 additions, 6 deletionshw/arm/armsse.c
- hw/arm/mps2-tz.c 20 additions, 19 deletionshw/arm/mps2-tz.c
- hw/arm/smmuv3.c 26 additions, 24 deletionshw/arm/smmuv3.c
- hw/intc/arm_gicv3_cpuif.c 32 additions, 16 deletionshw/intc/arm_gicv3_cpuif.c
- include/exec/exec-all.h 44 additions, 0 deletionsinclude/exec/exec-all.h
- include/hw/arm/armsse.h 2 additions, 0 deletionsinclude/hw/arm/armsse.h
- linux-user/elfload.c 10 additions, 0 deletionslinux-user/elfload.c
- target/arm/cpu.c 2 additions, 0 deletionstarget/arm/cpu.c
- target/arm/cpu.h 76 additions, 0 deletionstarget/arm/cpu.h
- target/arm/cpu64.c 14 additions, 0 deletionstarget/arm/cpu64.c
- target/arm/cpu_tcg.c 1 addition, 0 deletionstarget/arm/cpu_tcg.c
- target/arm/helper-sve.h 721 additions, 1 deletiontarget/arm/helper-sve.h
- target/arm/helper.c 325 additions, 2 deletionstarget/arm/helper.c
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