Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210108' into staging
target-arm queue:
* intc/arm_gic: Fix gic_irq_signaling_enabled() for vCPUs
* target/arm: Fix MTE0_ACTIVE
* target/arm: Implement v8.1M and Cortex-M55 model
* hw/arm/highbank: Drop dead KVM support code
* util/qemu-timer: Make timer_free() imply timer_del()
* various devices: Use ptimer_free() in finalize function
* docs/system: arm: Add sabrelite board description
* sabrelite: Minor fixes to allow booting U-Boot
# gpg: Signature made Fri 08 Jan 2021 15:34:25 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210108: (23 commits)
docs/system: arm: Add sabrelite board description
hw/arm: sabrelite: Connect the Ethernet PHY at address 6
hw/msic: imx6_ccm: Correct register value for silicon type
hw/misc: imx6_ccm: Update PMU_MISC0 reset value
exynos4210_mct: Use ptimer_free() in the finalize function to avoid memleaks
musicpal: Use ptimer_free() in the finalize function to avoid memleaks
mss-timer: Use ptimer_free() in the finalize function to avoid memleaks
exynos4210_pwm: Use ptimer_free() in the finalize function to avoid memleaks
exynos4210_rtc: Use ptimer_free() in the finalize function to avoid memleaks
allwinner-a10-pit: Use ptimer_free() in the finalize function to avoid memleaks
digic-timer: Use ptimer_free() in the finalize function to avoid memleaks
target/arm: Remove timer_del()/timer_deinit() before timer_free()
Remove superfluous timer_del() calls
scripts/coccinelle: New script to remove unnecessary timer_del() calls
util/qemu-timer: Make timer_free() imply timer_del()
hw/arm/highbank: Drop dead KVM support code
target/arm: Implement Cortex-M55 model
target/arm: Implement FPCXT_NS fp system register
target/arm: Correct store of FPSCR value via FPCXT_S
hw/intc/armv7m_nvic: Correct handling of CCR.BFHFNMIGN
...
Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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- block/iscsi.c 0 additions, 2 deletionsblock/iscsi.c
- block/nbd.c 0 additions, 1 deletionblock/nbd.c
- block/qcow2.c 0 additions, 1 deletionblock/qcow2.c
- docs/system/arm/sabrelite.rst 119 additions, 0 deletionsdocs/system/arm/sabrelite.rst
- docs/system/target-arm.rst 1 addition, 0 deletionsdocs/system/target-arm.rst
- hw/arm/highbank.c 4 additions, 10 deletionshw/arm/highbank.c
- hw/arm/musicpal.c 12 additions, 0 deletionshw/arm/musicpal.c
- hw/arm/sabrelite.c 4 additions, 0 deletionshw/arm/sabrelite.c
- hw/arm/virt-acpi-build.c 5 additions, 4 deletionshw/arm/virt-acpi-build.c
- hw/arm/virt.c 10 additions, 11 deletionshw/arm/virt.c
- hw/block/nvme.c 0 additions, 2 deletionshw/block/nvme.c
- hw/char/serial.c 0 additions, 2 deletionshw/char/serial.c
- hw/char/virtio-serial-bus.c 0 additions, 2 deletionshw/char/virtio-serial-bus.c
- hw/ide/core.c 0 additions, 1 deletionhw/ide/core.c
- hw/input/hid.c 0 additions, 1 deletionhw/input/hid.c
- hw/intc/apic.c 0 additions, 1 deletionhw/intc/apic.c
- hw/intc/arm_gic.c 3 additions, 1 deletionhw/intc/arm_gic.c
- hw/intc/armv7m_nvic.c 15 additions, 0 deletionshw/intc/armv7m_nvic.c
- hw/intc/ioapic.c 0 additions, 1 deletionhw/intc/ioapic.c
- hw/ipmi/ipmi_bmc_extern.c 0 additions, 1 deletionhw/ipmi/ipmi_bmc_extern.c
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