Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170210' into staging
target-arm queue:
* aspeed: minor fixes
* virt: declare fwcfg and virtio-mmio as DMA coherent in DT & ACPI
* arm: enable basic TCG emulation of PMU for AArch64
# gpg: Signature made Fri 10 Feb 2017 18:06:30 GMT
# gpg: using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20170210:
aspeed/smc: use a modulo to check segment limits
aspeed/smc: handle dummies only in fast read mode
aspeed: remove useless comment on controller segment size
aspeed: check for negative values returned by blk_getlength()
hw/arm/virt: Declare fwcfg as dma cache coherent in dt
hw/arm/virt: Declare fwcfg as dma cache coherent in ACPI
hw/arm/virt: Declare virtio-mmio as dma cache coherent in ACPI
target-arm: Declare virtio-mmio as dma-coherent in dt
target-arm: Enable vPMU support under TCG mode
target-arm: Add support for PMU register PMINTENSET_EL1
target-arm: Add support for AArch64 PMU register PMXEVTYPER_EL0
target-arm: Add support for PMU register PMSELR_EL0
Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
No related branches found
No related tags found
Showing
- hw/arm/aspeed.c 15 additions, 7 deletionshw/arm/aspeed.c
- hw/arm/vexpress.c 1 addition, 0 deletionshw/arm/vexpress.c
- hw/arm/virt-acpi-build.c 2 additions, 0 deletionshw/arm/virt-acpi-build.c
- hw/arm/virt.c 3 additions, 1 deletionhw/arm/virt.c
- hw/ssi/aspeed_smc.c 8 additions, 5 deletionshw/ssi/aspeed_smc.c
- target/arm/cpu.c 1 addition, 1 deletiontarget/arm/cpu.c
- target/arm/cpu.h 2 additions, 2 deletionstarget/arm/cpu.h
- target/arm/helper.c 56 additions, 18 deletionstarget/arm/helper.c
Loading
Please register or sign in to comment