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Commit 62be3934 authored by Paul Burton's avatar Paul Burton Committed by Yongbok Kim
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hw: xilinx-pcie: Add support for Xilinx AXI PCIe Controller


Add support for emulating the Xilinx AXI Root Port Bridge for PCI
Express as described by Xilinx' PG055 document. This is a PCIe
controller that can be used with certain series of Xilinx FPGAs, and is
used on the MIPS Boston board which will make use of this code.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
[yongbok.kim@imgtec.com:
  removed returning on !level,
  updated IRQ connection with GPIO logic,
  moved xilinx_pcie_init() to boston.c
  replaced stw_le_p() with pci_set_word()
  and other cosmetic changes]
Signed-off-by: default avatarYongbok Kim <yongbok.kim@imgtec.com>
parent 51b58561
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