target/loongarch: Implement LASX fpu fcvt instructions
This patch includes: - XVFCVT{L/H}.{S.H/D.S}; - XVFCVT.{H.S/S.D}; - XVFRINT[{RNE/RZ/RP/RM}].{S/D}; - XVFTINT[{RNE/RZ/RP/RM}].{W.S/L.D}; - XVFTINT[RZ].{WU.S/LU.D}; - XVFTINT[{RNE/RZ/RP/RM}].W.D; - XVFTINT[{RNE/RZ/RP/RM}]{L/H}.L.S; - XVFFINT.{S.W/D.L}[U]; - X[CVFFINT.S.L, VFFINT{L/H}.D.W. Signed-off-by:Song Gao <gaosong@loongson.cn> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230914022645.1151356-48-gaosong@loongson.cn>
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- target/loongarch/disas.c 56 additions, 0 deletionstarget/loongarch/disas.c
- target/loongarch/insn_trans/trans_vec.c.inc 52 additions, 0 deletionstarget/loongarch/insn_trans/trans_vec.c.inc
- target/loongarch/insns.decode 58 additions, 0 deletionstarget/loongarch/insns.decode
- target/loongarch/vec_helper.c 149 additions, 86 deletionstarget/loongarch/vec_helper.c
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