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Commit 5fb2dcd1 authored by Yongbok Kim's avatar Yongbok Kim Committed by Aleksandar Markovic
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target/mips: Provide R/W access to SAARI and SAAR CP0 registers 


Provide R/W access to SAARI and SAAR CP0 registers.

Reviewed-by: default avatarStefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: default avatarYongbok Kim <yongbok.kim@mips.com>
Signed-off-by: default avatarAleksandar Markovic <amarkovic@wavecomp.com>
parent 167db30e
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