riscv: Unify Qemu's reset vector code path
Currently, all riscv machines except sifive_u have identical reset vector code implementations with memory addresses being different for all machines. They can be easily combined into a single function in common code. Move it to common function and let all the machines use the common function. Signed-off-by:Atish Patra <atish.patra@wdc.com> Reviewed-by:
Alistair Francis <alistair.francis@wdc.com> Reviewed-by:
Bin Meng <bin.meng@windriver.com> Tested-by:
Bin Meng <bin.meng@windriver.com> Message-Id: <20200701183949.398134-2-atish.patra@wdc.com> Signed-off-by:
Alistair Francis <alistair.francis@wdc.com>
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- hw/riscv/boot.c 46 additions, 0 deletionshw/riscv/boot.c
- hw/riscv/sifive_u.c 0 additions, 1 deletionhw/riscv/sifive_u.c
- hw/riscv/spike.c 3 additions, 38 deletionshw/riscv/spike.c
- hw/riscv/virt.c 3 additions, 37 deletionshw/riscv/virt.c
- include/hw/riscv/boot.h 2 additions, 0 deletionsinclude/hw/riscv/boot.h
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