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Commit 3539d84d authored by Alex Bennée's avatar Alex Bennée
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semihosting: move semihosting tests to multiarch


It may be arm-compat-semihosting but more than one architecture uses
it so lets move the tests into the multiarch area. We gate it on the
feature and split the semicall.h header between the arches.

Also clean-up a bit of the Makefile messing about to one common set of
runners.

Signed-off-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-Id: <20210323165308.15244-6-alex.bennee@linaro.org>
parent 320d0bca
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......@@ -3286,6 +3286,7 @@ M: Alex Bennée <alex.bennee@linaro.org>
S: Maintained
F: semihosting/
F: include/semihosting/
F: tests/tcg/multiarch/arm-compat-semi/
Multi-process QEMU
M: Elena Ufimtseva <elena.ufimtseva@oracle.com>
......
......@@ -32,6 +32,9 @@
all:
-include ../../../config-host.mak
-include ../config-$(TARGET).mak
ifeq ($(CONFIG_USER_ONLY),y)
-include $(SRC_PATH)/default-configs/targets/$(TARGET).mak
endif
# for including , in command strings
COMMA := ,
......
......@@ -41,24 +41,6 @@ AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4
mte-%: CFLAGS += -march=armv8.5-a+memtag
endif
# Semihosting smoke test for linux-user
AARCH64_TESTS += semihosting
run-semihosting: semihosting
$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
run-plugin-semihosting-with-%:
$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
$(call strip-plugin,$<) 2> $<.err, \
"$< on $(TARGET_NAME) with $*")
AARCH64_TESTS += semiconsole
run-semiconsole: semiconsole
$(call skip-test, $<, "MANUAL ONLY")
run-plugin-semiconsole-with-%:
$(call skip-test, $<, "MANUAL ONLY")
ifneq ($(DOCKER_IMAGE)$(CROSS_CC_HAS_SVE),)
# System Registers Tests
AARCH64_TESTS += sysregs
......
/*
* Semihosting Tests - AArch64 helper
*
* Copyright (c) 2019
* Written by Alex Bennée <alex.bennee@linaro.org>
*
* SPDX-License-Identifier: GPL-3.0-or-later
*/
uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
{
register uintptr_t t asm("x0") = type;
register uintptr_t a0 asm("x1") = arg0;
asm("hlt 0xf000"
: "=r" (t)
: "r" (t), "r" (a0));
return t;
}
......@@ -29,37 +29,31 @@ run-fcvt: fcvt
$(call run-test,fcvt,$(QEMU) $<,"$< on $(TARGET_NAME)")
$(call diff-out,fcvt,$(ARM_SRC)/fcvt.ref)
ifeq ($(CONFIG_ARM_COMPATIBLE_SEMIHOSTING),y)
# Semihosting smoke test for linux-user
ARM_TESTS += semihosting
semihosting: CFLAGS += -mthumb
run-semihosting: semihosting
$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
ARM_TESTS += semihosting-arm
semihosting-arm: CFLAGS += -marm
semihosting-arm: CFLAGS += -marm -I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
semihosting-arm: semihosting.c
$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
run-semihosting-arm: semihosting-arm
$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
run-plugin-semihosting-with-%:
run-plugin-semihosting-arm-with-%:
$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
$(call strip-plugin,$<) 2> $<.err, \
"$< on $(TARGET_NAME) with $*")
ARM_TESTS += semiconsole semiconsole-arm
ARM_TESTS += semiconsole-arm
semiconsole: CFLAGS += -mthumb
run-semiconsole: semiconsole
$(call skip-test, $<, "MANUAL ONLY")
run-plugin-semiconsole-with-%:
$(call skip-test, $<, "MANUAL ONLY")
semiconsole-arm: CFLAGS += -marm
semiconsole-arm: semiconsole.c
semiconsole-arm: CFLAGS += -marm -I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
semiconsole-arm: semihosting.c
$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
run-semiconsole-arm: semiconsole-arm
......@@ -68,6 +62,8 @@ run-semiconsole-arm: semiconsole-arm
run-plugin-semiconsole-arm-with-%:
$(call skip-test, $<, "MANUAL ONLY")
endif
ARM_TESTS += commpage
TESTS += $(ARM_TESTS)
......
/*
* Semihosting Tests
* Semihosting Tests - ARM Helper
*
* Copyright (c) 2019
* Written by Alex Bennée <alex.bennee@linaro.org>
......@@ -7,13 +7,8 @@
* SPDX-License-Identifier: GPL-3.0-or-later
*/
#define SYS_WRITE0 0x04
#define SYS_READC 0x07
#define SYS_REPORTEXC 0x18
uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
{
#if defined(__arm__)
register uintptr_t t asm("r0") = type;
register uintptr_t a0 asm("r1") = arg0;
#ifdef __thumb__
......@@ -23,13 +18,5 @@ uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
#endif
asm(SVC : "=r" (t)
: "r" (t), "r" (a0));
#else
register uintptr_t t asm("x0") = type;
register uintptr_t a0 asm("x1") = arg0;
asm("hlt 0xf000"
: "=r" (t)
: "r" (t), "r" (a0));
#endif
return t;
}
......@@ -69,6 +69,37 @@ run-gdbstub-%:
endif
EXTRA_RUNS += run-gdbstub-sha1 run-gdbstub-qxfer-auxv-read
# ARM Compatible Semi Hosting Tests
#
# Despite having ARM in the name we actually have several
# architectures that implement it. We gate the tests on the feature
# appearing in config.
#
ifeq ($(CONFIG_ARM_COMPATIBLE_SEMIHOSTING),y)
VPATH += $(MULTIARCH_SRC)/arm-compat-semi
# Add -I path back to TARGET_NAME for semicall.h
semihosting: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
run-semihosting: semihosting
$(call run-test,$<,$(QEMU) $< 2> $<.err, "$< on $(TARGET_NAME)")
run-plugin-semihosting-with-%:
$(call run-test, $@, $(QEMU) $(QEMU_OPTS) \
-plugin $(PLUGIN_LIB)/$(call extract-plugin,$@) \
$(call strip-plugin,$<) 2> $<.err, \
"$< on $(TARGET_NAME) with $*")
semiconsole: CFLAGS+=-I$(SRC_PATH)/tests/tcg/$(TARGET_NAME)
run-semiconsole: semiconsole
$(call skip-test, $<, "MANUAL ONLY")
run-plugin-semiconsole-with-%:
$(call skip-test, $<, "MANUAL ONLY")
TESTS += semihosting semiconsole
endif
# Update TESTS
TESTS += $(MULTIARCH_TESTS)
......@@ -7,6 +7,8 @@
* SPDX-License-Identifier: GPL-3.0-or-later
*/
#define SYS_READC 0x07
#include <stdio.h>
#include <stdint.h>
#include "semicall.h"
......
......@@ -7,12 +7,15 @@
* SPDX-License-Identifier: GPL-3.0-or-later
*/
#define SYS_WRITE0 0x04
#define SYS_REPORTEXC 0x18
#include <stdint.h>
#include "semicall.h"
int main(int argc, char *argv[argc])
{
#if defined(__arm__)
#if UINTPTR_MAX == UINT32_MAX
uintptr_t exit_code = 0x20026;
#else
uintptr_t exit_block[2] = {0x20026, 0};
......
/*
* Semihosting Tests - RiscV64 Helper
*
* Copyright (c) 2021
* Written by Alex Bennée <alex.bennee@linaro.org>
*
* SPDX-License-Identifier: GPL-3.0-or-later
*/
uintptr_t __semi_call(uintptr_t type, uintptr_t arg0)
{
register uintptr_t t asm("a0") = type;
register uintptr_t a0 asm("a1") = arg0;
asm(".option norvc\n\t"
".balign 16\n\t"
"slli zero, zero, 0x1f\n\t"
"ebreak\n\t"
"srai zero, zero, 0x7\n\t"
: "=r" (t)
: "r" (t), "r" (a0));
return t;
}
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