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Commit 34a0fad1 authored by Tom Musta's avatar Tom Musta Committed by Alexander Graf
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target-ppc: Bug Fix: srawi


For 64 bit implementations, the special case of a shift by zero
should result in the sign extension of the least significant 32 bits
of the source GPR (not a direct copy of the 64 bit source GPR).

Example:

R3 A6212433228F41DC
srawi 3,3,0
R3 expected : 00000000228F41DC
R3 actual   : A6212433228F41DC (without this patch)

Signed-off-by: default avatarTom Musta <tommusta@gmail.com>
Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent 9824d01d
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