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Commit 30dd5ff8 authored by Philippe Mathieu-Daudé's avatar Philippe Mathieu-Daudé
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MAINTAINERS: Inherit from nanoMIPS

6 months ago Stefan Pejic stepped in as nanoMIPS maintainer
(see commit a 8e0e2344 "target/mips: Undeprecate nanoMIPS
ISA support in QEMU"), however today his email is bouncing:

  ** Message blocked **

  Your message to stefan.pejic@syrmia.com has been blocked. See technical details below for more information.

  The response from the remote server was:
  550 5.4.1 Recipient address rejected: Access denied. AS(201806281) [DBAEUR03FT030.eop-EUR03.prod.protection.outlook.com]

To avoid unmaintained code, I feel forced to merge this code
back with the generic MIPS section.

Historical references:
- https://lore.kernel.org/qemu-devel/TY0PR03MB679726901BD6C6BE40114A2FE2A79@TY0PR03MB6797.apcprd03.prod.outlook.com/
- https://lore.kernel.org/qemu-devel/b858a20e97b74e7b90a94948314d0008@MTKMBS62N2.mediatek.inc/



Cc: Vince Del Vecchio <Vince.DelVecchio@mediatek.com>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-Id: <49f41916-687f-b9e5-2de7-9c658fe0d4c7@linaro.org>
Tested-by: default avatarThomas Huth <thuth@redhat.com>
Signed-off-by: default avatarPhilippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221101114458.25756-6-philmd@linaro.org>
parent bb3daca7
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......@@ -237,16 +237,10 @@ R: Jiaxun Yang <jiaxun.yang@flygoat.com>
R: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
S: Odd Fixes
F: target/mips/
F: disas/mips.c
F: disas/*mips.c
F: docs/system/cpu-models-mips.rst.inc
F: tests/tcg/mips/
MIPS TCG CPUs (nanoMIPS ISA)
M: Stefan Pejic <stefan.pejic@syrmia.com>
S: Maintained
F: disas/nanomips.*
F: target/mips/tcg/*nanomips*
NiosII TCG CPUs
M: Chris Wulff <crwulff@gmail.com>
M: Marek Vasut <marex@denx.de>
......
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