Merge tag 'pull-ppc-20220526' of https://gitlab.com/danielhb/qemu into staging
ppc patch queue for 2022-05-26: Most of the changes are enhancements/fixes made in TCG ppc emulation code. Several bugs fixes were made across the board as well. Changes include: - tcg and target/ppc: VSX MMA implementation, fixes in helper declarations to use call flags, memory ordering, tlbie and others - pseries: fixed stdout-path setting with -machine graphics=off - pseries: allow use of elf parser for kernel address - other assorted fixes and improvements # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCYo/yvgAKCRA82cqW3gMx # ZMeRAQCWmqz4OyiJ9mjENYT8eIgIQWo9RzhFe4nNAaOqrNei/gD7Bx1Ut4qsLY9Z # 30wMgf/t89dXLW66zaZO+mCvEMHPsgw= # =U8gx # -----END PGP SIGNATURE----- # gpg: Signature made Thu 26 May 2022 02:35:58 PM PDT # gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164 # gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164 * tag 'pull-ppc-20220526' of https://gitlab.com/danielhb/qemu : (34 commits) linux-user: Add PowerPC ISA 3.1 and MMA to hwcap target/ppc: Implemented [pm]xvbf16ger2* target/ppc: Implemented pmxvf*ger* target/ppc: Implemented xvf16ger* target/ppc: Implemented xvf*ger* target/ppc: Implemented pmxvi*ger* instructions target/ppc: Implemented xvi*ger* instructions target/ppc: Implement xxm[tf]acc and xxsetaccz target/ppc: Implement lwsync with weaker memory ordering tcg/ppc: Optimize memory ordering generation with lwsync tcg/ppc: ST_ST memory ordering is not provided with eieio target/ppc: Fix eieio memory ordering semantics target/ppc: declare vmsumsh[ms] helper with call flags target/ppc: declare vmsumuh[ms] helper with call flags target/ppc: declare vmsum[um]bm helpers with call flags target/ppc: introduce do_va_helper target/ppc: declare xxextractuw and xxinsertw helpers with call flags target/ppc: declare xvxsigsp helper with call flags target/ppc: declare xscvspdpn helper with call flags target/ppc: Use TCG_CALL_NO_RWG_SE in fsel helper ... Signed-off-by:Richard Henderson <richard.henderson@linaro.org>
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- docs/system/ppc/pseries.rst 29 additions, 0 deletionsdocs/system/ppc/pseries.rst
- hmp-commands-info.hx 1 addition, 1 deletionhmp-commands-info.hx
- hw/intc/pnv_xive2.c 0 additions, 3 deletionshw/intc/pnv_xive2.c
- hw/ppc/e500.c 0 additions, 1 deletionhw/ppc/e500.c
- hw/ppc/spapr.c 19 additions, 6 deletionshw/ppc/spapr.c
- include/hw/ppc/spapr.h 1 addition, 1 deletioninclude/hw/ppc/spapr.h
- linux-user/elfload.c 4 additions, 0 deletionslinux-user/elfload.c
- monitor/misc.c 3 additions, 0 deletionsmonitor/misc.c
- target/ppc/cpu.h 18 additions, 1 deletiontarget/ppc/cpu.h
- target/ppc/cpu_init.c 7 additions, 6 deletionstarget/ppc/cpu_init.c
- target/ppc/fpu_helper.c 451 additions, 120 deletionstarget/ppc/fpu_helper.c
- target/ppc/helper.h 146 additions, 113 deletionstarget/ppc/helper.h
- target/ppc/helper_regs.c 1 addition, 1 deletiontarget/ppc/helper_regs.c
- target/ppc/insn32.decode 78 additions, 2 deletionstarget/ppc/insn32.decode
- target/ppc/insn64.decode 79 additions, 0 deletionstarget/ppc/insn64.decode
- target/ppc/int_helper.c 138 additions, 14 deletionstarget/ppc/int_helper.c
- target/ppc/internal.h 15 additions, 0 deletionstarget/ppc/internal.h
- target/ppc/machine.c 2 additions, 1 deletiontarget/ppc/machine.c
- target/ppc/translate.c 33 additions, 2 deletionstarget/ppc/translate.c
- target/ppc/translate/fp-impl.c.inc 28 additions, 2 deletionstarget/ppc/translate/fp-impl.c.inc
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