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Peter Maydell authored
For SSE-300, the SYSINFO register block has two new registers: * SYS_CONFIG1 indicates the config for a potential CPU2 and CPU3; since the SSE-300 can only be configured with a single CPU it is always zero * IIDR is the subsystem implementation identity register; its value is set by the SoC integrator, so we plumb this in from the armsse.c code as we do with SYS_VERSION and SYS_CONFIG Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Tested-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-id: 20210219144617.4782-11-peter.maydell@linaro.org
Peter Maydell authoredFor SSE-300, the SYSINFO register block has two new registers: * SYS_CONFIG1 indicates the config for a potential CPU2 and CPU3; since the SSE-300 can only be configured with a single CPU it is always zero * IIDR is the subsystem implementation identity register; its value is set by the SoC integrator, so we plumb this in from the armsse.c code as we do with SYS_VERSION and SYS_CONFIG Signed-off-by:
Peter Maydell <peter.maydell@linaro.org> Tested-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by:
Richard Henderson <richard.henderson@linaro.org> Message-id: 20210219144617.4782-11-peter.maydell@linaro.org