This reverts commit 1faea7d6.

Support switching x86 syntax for capstone.



See merge request !23

add x86 function start prologue



See merge request !24

Added the prologue "mov edi, edi; push ebp; mov ebp, esp"

Bug fix: st register offsets mismatch on x86 and amd64

As we have discussed on slack, `stX` should be handled specifically in `SimState.regs`. Any mapping with constant offset doesn't make sense.

To make CI pass, further changes are required in `SimuVEX`.

See merge request !22

which is common in Windows binaries.
Note that the set function_prologs was converted to a list to keep the order.

Add the rest of the arch_x86 regs and the rest of the ip_at_syscall registers. totally invents this register on mips

Wip/unicorn arch



See merge request !21