From 01b1361f84d55a86be486323836a29488b52e3a6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Christoph=20M=C3=BCllner?= <christoph.muellner@vrull.eu>
Date: Mon, 12 Jun 2023 13:10:30 +0200
Subject: [PATCH] disas/riscv: Make rv_op_illegal a shared enum value
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The enum value 'rv_op_illegal' does not represent an
instruction, but is a catch-all value in case we have
no match in the decoder. Let's make the value a shared
one, so that other compile units can reuse it.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Message-Id: <20230612111034.3955227-5-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
disas/riscv.c | 2 +-
disas/riscv.h | 4 ++++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/disas/riscv.c b/disas/riscv.c
index 4a553482677..b6ced2a26a7 100644
--- a/disas/riscv.c
+++ b/disas/riscv.c
@@ -23,7 +23,7 @@
#include "disas/riscv.h"
typedef enum {
- rv_op_illegal = 0,
+ /* 0 is reserved for rv_op_illegal. */
rv_op_lui = 1,
rv_op_auipc = 2,
rv_op_jal = 3,
diff --git a/disas/riscv.h b/disas/riscv.h
index 9288255915f..debbe692399 100644
--- a/disas/riscv.h
+++ b/disas/riscv.h
@@ -191,6 +191,10 @@ typedef struct {
const rvc_constraint *constraints;
} rv_comp_data;
+enum {
+ rv_op_illegal = 0
+};
+
enum {
rvcd_imm_nz = 0x1
};
--
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