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Richard Henderson authored
Failure to do so results in the tcg optimizer sign-extending any constant fold from 32-bits. This turns out to be visible in the RISC-V testsuite using a host that emits these opcodes (e.g. any non-x86_64). Reported-by:
Michael Clark <mjc@sifive.com>
Reviewed-by:
Emilio G. Cota <cota@braap.org>
Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>Richard Henderson authoredFailure to do so results in the tcg optimizer sign-extending any constant fold from 32-bits. This turns out to be visible in the RISC-V testsuite using a host that emits these opcodes (e.g. any non-x86_64). Reported-by:
Michael Clark <mjc@sifive.com>
Reviewed-by:
Emilio G. Cota <cota@braap.org>
Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by:
Richard Henderson <richard.henderson@linaro.org>
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