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    eab0a2d0
    spapr/xive: Allocate vCPU IPIs from the vCPU contexts · eab0a2d0
    Cédric Le Goater authored
    
    
    When QEMU switches to the XIVE interrupt mode, it creates all the
    guest interrupts at the level of the KVM device. These interrupts are
    backed by real HW interrupts from the IPI interrupt pool of the XIVE
    controller.
    
    Currently, this is done from the QEMU main thread, which results in
    allocating all interrupts from the chip on which QEMU is running. IPIs
    are not distributed across the system and the load is not well
    balanced across the interrupt controllers.
    
    Change the vCPU IPI allocation to run from the vCPU context. The
    associated XIVE IPI interrupt will be allocated on the chip on which
    the vCPU is running and improve distribution of the IPIs in the system.
    When the vCPUs are pinned, this will make the IPI local to the chip of
    the vCPU. It will reduce rerouting between interrupt controllers and
    gives better performance.
    
    Device interrupts are still treated the same. To improve placement, we
    would need some information on the chip owning the virtual source or
    the HW source in case of a passthrough device but this reuires
    changes in PAPR.
    
    Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
    Message-Id: <20200820134547.2355743-5-clg@kaod.org>
    Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
    eab0a2d0
    spapr/xive: Allocate vCPU IPIs from the vCPU contexts
    Cédric Le Goater authored
    
    
    When QEMU switches to the XIVE interrupt mode, it creates all the
    guest interrupts at the level of the KVM device. These interrupts are
    backed by real HW interrupts from the IPI interrupt pool of the XIVE
    controller.
    
    Currently, this is done from the QEMU main thread, which results in
    allocating all interrupts from the chip on which QEMU is running. IPIs
    are not distributed across the system and the load is not well
    balanced across the interrupt controllers.
    
    Change the vCPU IPI allocation to run from the vCPU context. The
    associated XIVE IPI interrupt will be allocated on the chip on which
    the vCPU is running and improve distribution of the IPIs in the system.
    When the vCPUs are pinned, this will make the IPI local to the chip of
    the vCPU. It will reduce rerouting between interrupt controllers and
    gives better performance.
    
    Device interrupts are still treated the same. To improve placement, we
    would need some information on the chip owning the virtual source or
    the HW source in case of a passthrough device but this reuires
    changes in PAPR.
    
    Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
    Message-Id: <20200820134547.2355743-5-clg@kaod.org>
    Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
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