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Peter Maydell authored
TileGX basic instructions # gpg: Signature made Tue 15 Sep 2015 15:57:08 BST using RSA key ID 4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" * remotes/rth/tags/pull-tile-20150915: (35 commits) target-tilegx: Handle v1shl, v1shru, v1shrs target-tilegx: Handle v1shli, v1shrui target-tilegx: Handle v4int_l/h target-tilegx: Handle atomic instructions target-tilegx: Handle mtspr, mfspr target-tilegx: Handle v1cmpeq, v1cmpne target-tilegx: Handle mask instructions target-tilegx: Handle scalar multiply instructions target-tilegx: Handle conditional move instructions target-tilegx: Handle shift instructions target-tilegx: Handle bitfield instructions target-tilegx: Implement system and memory management instructions target-tilegx: Handle comparison instructions target-tilegx: Handle conditional branch instructions target-tilegx: Handle unconditional jump instructions target-tilegx: Handle post-increment load and store instructions target-tilegx: Handle basic load and store instructions target-tilegx: Handle most bit manipulation instructions target-arm: Use new revbit functions host-utils: Add revbit functions ... Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>Peter Maydell authoredTileGX basic instructions # gpg: Signature made Tue 15 Sep 2015 15:57:08 BST using RSA key ID 4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" * remotes/rth/tags/pull-tile-20150915: (35 commits) target-tilegx: Handle v1shl, v1shru, v1shrs target-tilegx: Handle v1shli, v1shrui target-tilegx: Handle v4int_l/h target-tilegx: Handle atomic instructions target-tilegx: Handle mtspr, mfspr target-tilegx: Handle v1cmpeq, v1cmpne target-tilegx: Handle mask instructions target-tilegx: Handle scalar multiply instructions target-tilegx: Handle conditional move instructions target-tilegx: Handle shift instructions target-tilegx: Handle bitfield instructions target-tilegx: Implement system and memory management instructions target-tilegx: Handle comparison instructions target-tilegx: Handle conditional branch instructions target-tilegx: Handle unconditional jump instructions target-tilegx: Handle post-increment load and store instructions target-tilegx: Handle basic load and store instructions target-tilegx: Handle most bit manipulation instructions target-arm: Use new revbit functions host-utils: Add revbit functions ... Signed-off-by:
Peter Maydell <peter.maydell@linaro.org>
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